Search

Nicole Erin Kinsey White

Examiner (ID: 11555, Phone: (571)272-9943 , Office: P/1648 )

Most Active Art Unit
1648
Art Unit(s)
1648, 1672, 1671
Total Applications
1138
Issued Applications
564
Pending Applications
130
Abandoned Applications
476

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18839005 [patent_doc_number] => 11847077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Serial peripheral interface integrated circuit and operation method thereof [patent_app_type] => utility [patent_app_number] => 17/543673 [patent_app_country] => US [patent_app_date] => 2021-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3873 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17543673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/543673
Serial peripheral interface integrated circuit and operation method thereof Dec 5, 2021 Issued
Array ( [id] => 18422532 [patent_doc_number] => 20230176996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => EMBEDDED PHYSICAL LAYERS WITH PASSIVE INTERFACING FOR CONFIGURABLE INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/457659 [patent_app_country] => US [patent_app_date] => 2021-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17457659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/457659
Embedded physical layers with passive interfacing for configurable integrated circuits Dec 4, 2021 Issued
Array ( [id] => 20110212 [patent_doc_number] => 12360933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Detection system sending calculated data and raw data [patent_app_type] => utility [patent_app_number] => 17/541256 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17541256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/541256
Detection system sending calculated data and raw data Dec 2, 2021 Issued
Array ( [id] => 17629288 [patent_doc_number] => 20220164303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => OPTIMIZATIONS OF BUFFER INVALIDATIONS TO REDUCE MEMORY MANAGEMENT PERFORMANCE OVERHEAD [patent_app_type] => utility [patent_app_number] => 17/535289 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/535289
OPTIMIZATIONS OF BUFFER INVALIDATIONS TO REDUCE MEMORY MANAGEMENT PERFORMANCE OVERHEAD Nov 23, 2021 Abandoned
Array ( [id] => 18393505 [patent_doc_number] => 20230161725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => SMART SCALABLE DESIGN FOR A CROSSBAR [patent_app_type] => utility [patent_app_number] => 17/534109 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/534109
SMART SCALABLE DESIGN FOR A CROSSBAR Nov 22, 2021 Abandoned
Array ( [id] => 17643884 [patent_doc_number] => 20220171622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => MULTI-DIMENSION DMA CONTROLLER AND COMPUTER SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/533891 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17533891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/533891
MULTI-DIMENSION DMA CONTROLLER AND COMPUTER SYSTEM INCLUDING THE SAME Nov 22, 2021 Abandoned
Array ( [id] => 17659343 [patent_doc_number] => 20220179808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => APPARATUSES, METHODS, AND SYSTEMS FOR HARDWARE CONTROL OF PROCESSOR PERFORMANCE LEVELS [patent_app_type] => utility [patent_app_number] => 17/527929 [patent_app_country] => US [patent_app_date] => 2021-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17527929 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/527929
Apparatuses, methods, and systems for hardware control of processor performance levels Nov 15, 2021 Issued
Array ( [id] => 18957494 [patent_doc_number] => 20240045821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => MULTI-PATH SERVER AND MULTI-PATH SERVER SIGNAL INTERCONNECTION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/276413 [patent_app_country] => US [patent_app_date] => 2021-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18276413 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/276413
Multi-path server and multi-path server signal interconnection system Sep 27, 2021 Issued
Array ( [id] => 17338185 [patent_doc_number] => 20220004516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => System, Apparatus And Method For Extended Communication Modes For A Multi-Drop Interconnect [patent_app_type] => utility [patent_app_number] => 17/479001 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479001
System, apparatus and method for extended communication modes for a multi-drop interconnect Sep 19, 2021 Issued
Array ( [id] => 19677704 [patent_doc_number] => 12189560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Apparatus and method for training device-to-device physical interface [patent_app_type] => utility [patent_app_number] => 17/475705 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 13028 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475705
Apparatus and method for training device-to-device physical interface Sep 14, 2021 Issued
Array ( [id] => 19398836 [patent_doc_number] => 12073205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Independently upgradeable docking stations [patent_app_type] => utility [patent_app_number] => 17/447669 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9246 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447669 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447669
Independently upgradeable docking stations Sep 13, 2021 Issued
Array ( [id] => 19538202 [patent_doc_number] => 12130755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Serial interface for an active input/output expander of a memory sub-system [patent_app_type] => utility [patent_app_number] => 17/468264 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8453 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17468264 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/468264
Serial interface for an active input/output expander of a memory sub-system Sep 6, 2021 Issued
Array ( [id] => 18227519 [patent_doc_number] => 20230066513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => Asynchronous Reservation of Storage Volumes with Persistent Storage of Reservation Data [patent_app_type] => utility [patent_app_number] => 17/460568 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460568 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460568
Asynchronous reservation of storage volumes with persistent storage of reservation data Aug 29, 2021 Issued
Array ( [id] => 18576842 [patent_doc_number] => 11733363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Parameter loader for ultrasound probe and related apparatus and methods [patent_app_type] => utility [patent_app_number] => 17/460928 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460928 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460928
Parameter loader for ultrasound probe and related apparatus and methods Aug 29, 2021 Issued
Array ( [id] => 18678015 [patent_doc_number] => 20230315662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => HYBRID BUS COMMUNICATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/044257 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5173 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18044257 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/044257
HYBRID BUS COMMUNICATION CIRCUIT Aug 26, 2021 Pending
Array ( [id] => 17276639 [patent_doc_number] => 20210382837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => NAND SWITCH [patent_app_type] => utility [patent_app_number] => 17/406989 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406989 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406989
NAND switch Aug 18, 2021 Issued
Array ( [id] => 20133071 [patent_doc_number] => 12375390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Memory pooled time sensitive networking based architectures [patent_app_type] => utility [patent_app_number] => 17/404736 [patent_app_country] => US [patent_app_date] => 2021-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17404736 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/404736
Memory pooled time sensitive networking based architectures Aug 16, 2021 Issued
Array ( [id] => 18659973 [patent_doc_number] => 20230305980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => FLEXIBLY CONFIGURED MULTI-COMPUTING-NODE SERVER MAINBOARD STRUCTURE AND PROGRAM [patent_app_type] => utility [patent_app_number] => 18/020768 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3775 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18020768 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/020768
Flexibly configured multi-computing-node server mainboard structure and program Jul 29, 2021 Issued
Array ( [id] => 18165491 [patent_doc_number] => 20230032090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => DATA TRAFFIC PRIORITIZATION BASED ON CONTENT [patent_app_type] => utility [patent_app_number] => 17/388182 [patent_app_country] => US [patent_app_date] => 2021-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388182 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/388182
Data traffic prioritization based on content Jul 28, 2021 Issued
Array ( [id] => 19829975 [patent_doc_number] => 12250782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Modular electrical power distribution system with module detection systems and methods [patent_app_type] => utility [patent_app_number] => 17/387967 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 12773 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387967
Modular electrical power distribution system with module detection systems and methods Jul 27, 2021 Issued
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