Search

Nicole M. Barreca

Examiner (ID: 14576)

Most Active Art Unit
1756
Art Unit(s)
1756
Total Applications
389
Issued Applications
279
Pending Applications
40
Abandoned Applications
70

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6884815 [patent_doc_number] => 20010038976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Rinsing solution for lithography and method for processing substrate with the use of the same' [patent_app_type] => new [patent_app_number] => 09/877124 [patent_app_country] => US [patent_app_date] => 2001-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2720 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038976.pdf [firstpage_image] =>[orig_patent_app_number] => 09877124 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/877124
Rinsing solution for lithography and method for processing substrate with the use of the same Jun 10, 2001 Issued
Array ( [id] => 1280103 [patent_doc_number] => 06641982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Methodology to introduce metal and via openings' [patent_app_type] => B2 [patent_app_number] => 09/878058 [patent_app_country] => US [patent_app_date] => 2001-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2371 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/641/06641982.pdf [firstpage_image] =>[orig_patent_app_number] => 09878058 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/878058
Methodology to introduce metal and via openings Jun 6, 2001 Issued
Array ( [id] => 1302214 [patent_doc_number] => 06620575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-16 [patent_title] => 'Construction of built-up structures on the surface of patterned masking used for polysilicon etch' [patent_app_type] => B2 [patent_app_number] => 09/875069 [patent_app_country] => US [patent_app_date] => 2001-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7914 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620575.pdf [firstpage_image] =>[orig_patent_app_number] => 09875069 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/875069
Construction of built-up structures on the surface of patterned masking used for polysilicon etch Jun 4, 2001 Issued
Array ( [id] => 6444687 [patent_doc_number] => 20020177085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Self-aligned photolithographic process for forming silicon-on-insulator devices' [patent_app_type] => new [patent_app_number] => 09/864056 [patent_app_country] => US [patent_app_date] => 2001-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2248 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20020177085.pdf [firstpage_image] =>[orig_patent_app_number] => 09864056 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/864056
Self-aligned photolithographic process for forming silicon-on-insulator devices May 22, 2001 Abandoned
09/807331 Exposure apparatus May 13, 2001 Abandoned
Array ( [id] => 6047425 [patent_doc_number] => 20020168591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-14 [patent_title] => 'Method for reducing silicide spiking in a gate' [patent_app_type] => new [patent_app_number] => 09/851578 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2119 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20020168591.pdf [firstpage_image] =>[orig_patent_app_number] => 09851578 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/851578
Method for reducing silicide spiking in a gate May 9, 2001 Abandoned
Array ( [id] => 1369639 [patent_doc_number] => 06562553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-13 [patent_title] => 'Lithographic printing method using a low surface energy layer' [patent_app_type] => B2 [patent_app_number] => 09/881242 [patent_app_country] => US [patent_app_date] => 2001-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 1952 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/562/06562553.pdf [firstpage_image] =>[orig_patent_app_number] => 09881242 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/881242
Lithographic printing method using a low surface energy layer May 9, 2001 Issued
Array ( [id] => 1046647 [patent_doc_number] => 06864041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching' [patent_app_type] => utility [patent_app_number] => 09/847479 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2704 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864041.pdf [firstpage_image] =>[orig_patent_app_number] => 09847479 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/847479
Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching May 1, 2001 Issued
Array ( [id] => 5786854 [patent_doc_number] => 20020160314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Method of improving astigmatism of a photoresist layer' [patent_app_type] => new [patent_app_number] => 09/840996 [patent_app_country] => US [patent_app_date] => 2001-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2160 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20020160314.pdf [firstpage_image] =>[orig_patent_app_number] => 09840996 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840996
Method of improving astigmatism of a photoresist layer Apr 24, 2001 Issued
Array ( [id] => 1326114 [patent_doc_number] => 06599682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-29 [patent_title] => 'Method for forming a finely patterned photoresist layer' [patent_app_type] => B2 [patent_app_number] => 09/839200 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6815 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/599/06599682.pdf [firstpage_image] =>[orig_patent_app_number] => 09839200 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/839200
Method for forming a finely patterned photoresist layer Apr 22, 2001 Issued
Array ( [id] => 1296655 [patent_doc_number] => 06627387 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Method of photolithography' [patent_app_type] => B2 [patent_app_number] => 09/827827 [patent_app_country] => US [patent_app_date] => 2001-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 1503 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627387.pdf [firstpage_image] =>[orig_patent_app_number] => 09827827 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827827
Method of photolithography Apr 4, 2001 Issued
Array ( [id] => 7092751 [patent_doc_number] => 20010033975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Yield of dies by adding dummy pattern on open area of multi-project mask' [patent_app_type] => new [patent_app_number] => 09/813935 [patent_app_country] => US [patent_app_date] => 2001-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20010033975.pdf [firstpage_image] =>[orig_patent_app_number] => 09813935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/813935
Yield of dies by adding dummy pattern on open area of multi-project mask Mar 21, 2001 Abandoned
Array ( [id] => 1326104 [patent_doc_number] => 06599680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-29 [patent_title] => 'Method for forming cells array of mask read only memory' [patent_app_type] => B2 [patent_app_number] => 09/811392 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3257 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/599/06599680.pdf [firstpage_image] =>[orig_patent_app_number] => 09811392 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/811392
Method for forming cells array of mask read only memory Mar 19, 2001 Issued
Array ( [id] => 1338261 [patent_doc_number] => 06589715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-08 [patent_title] => 'Process for depositing and developing a plasma polymerized organosilicon photoresist film' [patent_app_type] => B2 [patent_app_number] => 09/810369 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 6166 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589715.pdf [firstpage_image] =>[orig_patent_app_number] => 09810369 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/810369
Process for depositing and developing a plasma polymerized organosilicon photoresist film Mar 14, 2001 Issued
Array ( [id] => 5844054 [patent_doc_number] => 20020132191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Method for forming a contact pad' [patent_app_type] => new [patent_app_number] => 09/803882 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2211 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20020132191.pdf [firstpage_image] =>[orig_patent_app_number] => 09803882 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/803882
Method for forming a contact pad Mar 12, 2001 Abandoned
Array ( [id] => 7078325 [patent_doc_number] => 20010041307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-15 [patent_title] => 'Three-dimensional microstructure' [patent_app_type] => new [patent_app_number] => 09/792969 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3927 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20010041307.pdf [firstpage_image] =>[orig_patent_app_number] => 09792969 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792969
Three-dimensional microstructure Feb 25, 2001 Abandoned
Array ( [id] => 7041051 [patent_doc_number] => 20010005638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-28 [patent_title] => 'Method for removing photoresist layer' [patent_app_type] => new-utility [patent_app_number] => 09/792570 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1691 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20010005638.pdf [firstpage_image] =>[orig_patent_app_number] => 09792570 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792570
Method for removing photoresist layer Feb 22, 2001 Abandoned
Array ( [id] => 6275558 [patent_doc_number] => 20020106587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Two mask via pattern to improve pattern definition' [patent_app_type] => new [patent_app_number] => 09/790537 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5956 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20020106587.pdf [firstpage_image] =>[orig_patent_app_number] => 09790537 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/790537
Two mask via pattern to improve pattern definition Feb 22, 2001 Abandoned
Array ( [id] => 6887753 [patent_doc_number] => 20010008747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-19 [patent_title] => 'Process for filling apertures in a circuit board or chip carrier' [patent_app_type] => new-utility [patent_app_number] => 09/788612 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4316 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20010008747.pdf [firstpage_image] =>[orig_patent_app_number] => 09788612 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788612
Process for filling apertures in a circuit board or chip carrier Feb 20, 2001 Issued
Array ( [id] => 6961168 [patent_doc_number] => 20010012600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Nanolaminated thin film circuitry materials' [patent_app_type] => new [patent_app_number] => 09/781462 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4044 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20010012600.pdf [firstpage_image] =>[orig_patent_app_number] => 09781462 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/781462
Nanolaminated thin film circuitry materials Feb 11, 2001 Issued
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