Search

Niki Marina Eloshway

Examiner (ID: 18560, Phone: (571)272-4538 , Office: P/3728 )

Most Active Art Unit
3736
Art Unit(s)
3736, 3207, 3727, 3781, 3728
Total Applications
2477
Issued Applications
1472
Pending Applications
223
Abandoned Applications
809

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4805995 [patent_doc_number] => 20080169573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-17 [patent_title] => 'CIRCUIT SUBSTRATE AND THE SEMICONDUCTOR PACKAGE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/014212 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20080169573.pdf [firstpage_image] =>[orig_patent_app_number] => 12014212 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014212
Circuit substrate and the semiconductor package having the same Jan 14, 2008 Issued
Array ( [id] => 34712 [patent_doc_number] => 07786569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-31 [patent_title] => 'Semiconductor device using wiring substrate having a wiring structure reducing wiring disconnection' [patent_app_type] => utility [patent_app_number] => 12/013422 [patent_app_country] => US [patent_app_date] => 2008-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 3842 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/786/07786569.pdf [firstpage_image] =>[orig_patent_app_number] => 12013422 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/013422
Semiconductor device using wiring substrate having a wiring structure reducing wiring disconnection Jan 11, 2008 Issued
Array ( [id] => 103165 [patent_doc_number] => 07728444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Wiring board' [patent_app_type] => utility [patent_app_number] => 12/007352 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 7320 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/728/07728444.pdf [firstpage_image] =>[orig_patent_app_number] => 12007352 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/007352
Wiring board Jan 8, 2008 Issued
Array ( [id] => 4925226 [patent_doc_number] => 20080164589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'POWER DEVICE PACKAGE COMPRISING METAL TAB DIE ATTACH PADDLE (DAP) AND METHOD OF FABRICATING THE PACKAGE' [patent_app_type] => utility [patent_app_number] => 11/970911 [patent_app_country] => US [patent_app_date] => 2008-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4263 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164589.pdf [firstpage_image] =>[orig_patent_app_number] => 11970911 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/970911
Power device package comprising metal tab die attach paddle (DAP) and method of fabricating the package Jan 7, 2008 Issued
Array ( [id] => 4843330 [patent_doc_number] => 20080179738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'WIRING BOARD AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/969402 [patent_app_country] => US [patent_app_date] => 2008-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11855 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20080179738.pdf [firstpage_image] =>[orig_patent_app_number] => 11969402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/969402
Wiring board and semiconductor device Jan 3, 2008 Issued
Array ( [id] => 4433482 [patent_doc_number] => 07968987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Carbon dioxide gettering for a chip module assembly' [patent_app_type] => utility [patent_app_number] => 11/968831 [patent_app_country] => US [patent_app_date] => 2008-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5239 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/968/07968987.pdf [firstpage_image] =>[orig_patent_app_number] => 11968831 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968831
Carbon dioxide gettering for a chip module assembly Jan 2, 2008 Issued
Array ( [id] => 23358 [patent_doc_number] => 07800219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'High-power semiconductor die packages with integrated heat-sink capability and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/968602 [patent_app_country] => US [patent_app_date] => 2008-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6585 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800219.pdf [firstpage_image] =>[orig_patent_app_number] => 11968602 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/968602
High-power semiconductor die packages with integrated heat-sink capability and methods of manufacturing the same Jan 1, 2008 Issued
Array ( [id] => 7730962 [patent_doc_number] => 08102062 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-24 [patent_title] => 'Optionally bonding either two sides or more sides of integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/966012 [patent_app_country] => US [patent_app_date] => 2007-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/102/08102062.pdf [firstpage_image] =>[orig_patent_app_number] => 11966012 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/966012
Optionally bonding either two sides or more sides of integrated circuits Dec 27, 2007 Issued
Array ( [id] => 4517956 [patent_doc_number] => 07911040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Integrated circuit package with improved connections' [patent_app_type] => utility [patent_app_number] => 11/965621 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 8183 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911040.pdf [firstpage_image] =>[orig_patent_app_number] => 11965621 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/965621
Integrated circuit package with improved connections Dec 26, 2007 Issued
Array ( [id] => 55054 [patent_doc_number] => 07768120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'Heat spreader and semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 12/005312 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 17144 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/768/07768120.pdf [firstpage_image] =>[orig_patent_app_number] => 12005312 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/005312
Heat spreader and semiconductor device using the same Dec 26, 2007 Issued
Array ( [id] => 5432258 [patent_doc_number] => 20090166844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'METAL COVER ON FLIP-CHIP MATRIX-ARRAY (FCMX) SUBSTRATE FOR LOW COST CPU ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 11/964401 [patent_app_country] => US [patent_app_date] => 2007-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1289 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20090166844.pdf [firstpage_image] =>[orig_patent_app_number] => 11964401 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/964401
METAL COVER ON FLIP-CHIP MATRIX-ARRAY (FCMX) SUBSTRATE FOR LOW COST CPU ASSEMBLY Dec 25, 2007 Abandoned
Array ( [id] => 4876713 [patent_doc_number] => 20080150096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'MULTI-CHIP MODULE, MANUFACTURING METHOD THEREOF, MOUNTING STRUCTURE OF MULTI-CHIP MODULE, AND MANUFACTURING METHOD OF MOUNTING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/960042 [patent_app_country] => US [patent_app_date] => 2007-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 25856 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150096.pdf [firstpage_image] =>[orig_patent_app_number] => 11960042 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/960042
MULTI-CHIP MODULE, MANUFACTURING METHOD THEREOF, MOUNTING STRUCTURE OF MULTI-CHIP MODULE, AND MANUFACTURING METHOD OF MOUNTING STRUCTURE Dec 18, 2007 Abandoned
Array ( [id] => 5542814 [patent_doc_number] => 20090152691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'LEADFRAME HAVING DIE ATTACH PAD WITH DELAMINATION AND CRACK-ARRESTING FEATURES' [patent_app_type] => utility [patent_app_number] => 11/959412 [patent_app_country] => US [patent_app_date] => 2007-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3605 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152691.pdf [firstpage_image] =>[orig_patent_app_number] => 11959412 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/959412
Leadframe having die attach pad with delamination and crack-arresting features Dec 17, 2007 Issued
Array ( [id] => 5542863 [patent_doc_number] => 20090152740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLIP CHIP' [patent_app_type] => utility [patent_app_number] => 11/957862 [patent_app_country] => US [patent_app_date] => 2007-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152740.pdf [firstpage_image] =>[orig_patent_app_number] => 11957862 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/957862
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLIP CHIP Dec 16, 2007 Abandoned
Array ( [id] => 4876763 [patent_doc_number] => 20080150146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/957152 [patent_app_country] => US [patent_app_date] => 2007-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150146.pdf [firstpage_image] =>[orig_patent_app_number] => 11957152 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/957152
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Dec 13, 2007 Abandoned
Array ( [id] => 5542811 [patent_doc_number] => 20090152688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM FOR SHIELDING ELECTROMAGNETIC INTERFERENCE' [patent_app_type] => utility [patent_app_number] => 11/956132 [patent_app_country] => US [patent_app_date] => 2007-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152688.pdf [firstpage_image] =>[orig_patent_app_number] => 11956132 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/956132
Integrated circuit package system for shielding electromagnetic interference Dec 12, 2007 Issued
Array ( [id] => 5542823 [patent_doc_number] => 20090152700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTABLE INTEGRATED CIRCUIT DIE' [patent_app_type] => utility [patent_app_number] => 11/954601 [patent_app_country] => US [patent_app_date] => 2007-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152700.pdf [firstpage_image] =>[orig_patent_app_number] => 11954601 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/954601
Mountable integrated circuit package system with mountable integrated circuit die Dec 11, 2007 Issued
Array ( [id] => 4745774 [patent_doc_number] => 20080090376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/954204 [patent_app_country] => US [patent_app_date] => 2007-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4660 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20080090376.pdf [firstpage_image] =>[orig_patent_app_number] => 11954204 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/954204
METHOD OF FABRICATING SEMICONDUCTOR DEVICE Dec 10, 2007 Abandoned
Array ( [id] => 4487609 [patent_doc_number] => 07902644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Integrated circuit package system for electromagnetic isolation' [patent_app_type] => utility [patent_app_number] => 11/952951 [patent_app_country] => US [patent_app_date] => 2007-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3860 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902644.pdf [firstpage_image] =>[orig_patent_app_number] => 11952951 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/952951
Integrated circuit package system for electromagnetic isolation Dec 6, 2007 Issued
Array ( [id] => 4673447 [patent_doc_number] => 20080211075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'IMAGE SENSOR CHIP SCALE PACKAGE HAVING INTER-ADHESION WITH GAP AND METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 11/950921 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6098 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20080211075.pdf [firstpage_image] =>[orig_patent_app_number] => 11950921 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/950921
IMAGE SENSOR CHIP SCALE PACKAGE HAVING INTER-ADHESION WITH GAP AND METHOD OF THE SAME Dec 4, 2007 Abandoned
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