Search

Nilufa Rahim

Examiner (ID: 1665, Phone: (571)272-8926 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893, RD00
Total Applications
618
Issued Applications
451
Pending Applications
99
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19314681 [patent_doc_number] => 12040511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Battery interconnects [patent_app_type] => utility [patent_app_number] => 18/414170 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 95 [patent_no_of_words] => 27796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414170
Battery interconnects Jan 15, 2024 Issued
Array ( [id] => 19349277 [patent_doc_number] => 20240258241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/406204 [patent_app_country] => US [patent_app_date] => 2024-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406204
ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF Jan 6, 2024 Pending
Array ( [id] => 19604839 [patent_doc_number] => 20240395719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/390834 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18390834 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/390834
SEMICONDUCTOR PACKAGE Dec 19, 2023 Pending
Array ( [id] => 19349264 [patent_doc_number] => 20240258228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 18/541630 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541630 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541630
INTEGRATED CIRCUIT DEVICE Dec 14, 2023 Pending
Array ( [id] => 19646605 [patent_doc_number] => 20240421125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/541649 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7997 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18541649 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/541649
SEMICONDUCTOR PACKAGE Dec 14, 2023 Pending
Array ( [id] => 19286080 [patent_doc_number] => 20240222558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => LIGHT EMITTING DIODE, MANUFACTURING METHOD AND LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/536249 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536249
LIGHT EMITTING DIODE, MANUFACTURING METHOD AND LIGHT EMITTING DEVICE Dec 11, 2023 Pending
Array ( [id] => 19086438 [patent_doc_number] => 20240113239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => INSULATION MODULE [patent_app_type] => utility [patent_app_number] => 18/537297 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537297
INSULATION MODULE Dec 11, 2023 Pending
Array ( [id] => 19407401 [patent_doc_number] => 20240290912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => LIGHT EMITTING DIODE AND LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/531703 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531703
LIGHT EMITTING DIODE AND LIGHT EMITTING DEVICE Dec 6, 2023 Pending
Array ( [id] => 20038063 [patent_doc_number] => 20250176285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => LIGHT DETECTING PIXEL USING VERTICAL GATES AND PLANAR GATES [patent_app_type] => utility [patent_app_number] => 18/521547 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4942 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521547
LIGHT DETECTING PIXEL USING VERTICAL GATES AND PLANAR GATES Nov 27, 2023 Pending
Array ( [id] => 20037992 [patent_doc_number] => 20250176214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => BACKSIDE DIELECTRIC LINERS [patent_app_type] => utility [patent_app_number] => 18/520606 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520606 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520606
BACKSIDE DIELECTRIC LINERS Nov 27, 2023 Pending
Array ( [id] => 19056991 [patent_doc_number] => 20240098960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => COMPACT ELECTRICAL CONNECTION THAT CAN BE USED TO FORM AN SRAM CELL AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/517277 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/517277
Compact electrical connection that can be used to form an SRAM cell and method of making the same Nov 21, 2023 Issued
Array ( [id] => 20776879 [patent_doc_number] => 12660577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Line-end extension method and device [patent_app_type] => utility [patent_app_number] => 18/516719 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516719
Line-end extension method and device Nov 20, 2023 Issued
Array ( [id] => 20869825 [patent_doc_number] => 12696744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-28 [patent_title] => Multi-metal fill with self-aligned patterning and dielectric with voids [patent_app_type] => utility [patent_app_number] => 18/514254 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2332 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514254
MULTI-METAL FILL WITH SELF-ALIGNED PATTERNING AND DIELECTRIC WITH VOIDS Nov 19, 2023 Issued
Array ( [id] => 19183861 [patent_doc_number] => 11990462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => 3D semiconductor device and structure with metal layers [patent_app_type] => utility [patent_app_number] => 18/384883 [patent_app_country] => US [patent_app_date] => 2023-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 69 [patent_no_of_words] => 51067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384883 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384883
3D semiconductor device and structure with metal layers Oct 28, 2023 Issued
Array ( [id] => 19130871 [patent_doc_number] => 20240136224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => METHODS FOR FILLING A RECESSED FEATURE ON A SUBSTRATE AND RELATED STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/381232 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381232 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381232
METHODS FOR FILLING A RECESSED FEATURE ON A SUBSTRATE AND RELATED STRUCTURES Oct 17, 2023 Pending
Array ( [id] => 19130871 [patent_doc_number] => 20240136224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => METHODS FOR FILLING A RECESSED FEATURE ON A SUBSTRATE AND RELATED STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/381232 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381232 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381232
METHODS FOR FILLING A RECESSED FEATURE ON A SUBSTRATE AND RELATED STRUCTURES Oct 16, 2023 Pending
Array ( [id] => 19866384 [patent_doc_number] => 20250105170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING STRESS-REDUCTION CHAMFERS AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/475292 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475292
SEMICONDUCTOR PACKAGE INCLUDING STRESS-REDUCTION CHAMFERS AND METHODS FOR FORMING THE SAME Sep 26, 2023 Pending
Array ( [id] => 19868338 [patent_doc_number] => 20250107124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => Power Semiconductor Device Having Shaped Trench Ends [patent_app_type] => utility [patent_app_number] => 18/475298 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10787 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475298
Power Semiconductor Device Having Shaped Trench Ends Sep 26, 2023 Pending
Array ( [id] => 19531977 [patent_doc_number] => 20240355879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => STACKED INTEGRATED CIRCUIT DEVICES INCLUDING STAGGERED GATE STRUCTURES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/475322 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475322 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475322
STACKED INTEGRATED CIRCUIT DEVICES INCLUDING STAGGERED GATE STRUCTURES AND METHODS OF FORMING THE SAME Sep 26, 2023 Pending
Array ( [id] => 19863948 [patent_doc_number] => 20250102734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SEMICONDUCTOR PHOTONICS DEVICES AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 18/475128 [patent_app_country] => US [patent_app_date] => 2023-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475128 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475128
SEMICONDUCTOR PHOTONICS DEVICES AND METHODS OF FORMATION Sep 25, 2023 Pending
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