Search

Nilufa Rahim

Examiner (ID: 1665, Phone: (571)272-8926 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893, RD00
Total Applications
618
Issued Applications
451
Pending Applications
99
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17284074 [patent_doc_number] => 11201115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/122897 [patent_app_country] => US [patent_app_date] => 2018-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2938 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122897 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122897
Semiconductor device Sep 5, 2018 Issued
Array ( [id] => 18292481 [patent_doc_number] => 11621354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Integrated circuit structures having partitioned source or drain contact structures [patent_app_type] => utility [patent_app_number] => 16/122284 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 47 [patent_no_of_words] => 19478 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122284 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122284
Integrated circuit structures having partitioned source or drain contact structures Sep 4, 2018 Issued
Array ( [id] => 17745778 [patent_doc_number] => 11393860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Solid-state imaging element, method for manufacturing solid-state imaging element, and electronic device [patent_app_type] => utility [patent_app_number] => 16/649265 [patent_app_country] => US [patent_app_date] => 2018-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 23566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16649265 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/649265
Solid-state imaging element, method for manufacturing solid-state imaging element, and electronic device Aug 6, 2018 Issued
Array ( [id] => 13740753 [patent_doc_number] => 20180374846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => DUAL-SERIES VARACTOR EPI [patent_app_type] => utility [patent_app_number] => 16/053211 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16053211 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/053211
Dual-series varactor EPI Aug 1, 2018 Issued
Array ( [id] => 16881142 [patent_doc_number] => 11031299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => FinFET device with different liners for PFET and NFET and method of fabricating thereof [patent_app_type] => utility [patent_app_number] => 16/045992 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16045992 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/045992
FinFET device with different liners for PFET and NFET and method of fabricating thereof Jul 25, 2018 Issued
Array ( [id] => 13785891 [patent_doc_number] => 20190006484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/043120 [patent_app_country] => US [patent_app_date] => 2018-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16043120 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/043120
Manufacturing method of semiconductor device Jul 22, 2018 Issued
Array ( [id] => 13996587 [patent_doc_number] => 20190067451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => FIN STRUCTURE FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/023640 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023640 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/023640
Fin structures having varied fin heights for semiconductor device Jun 28, 2018 Issued
Array ( [id] => 18292417 [patent_doc_number] => 11621290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Imaging element, laminated imaging element, and solid-state imaging device [patent_app_type] => utility [patent_app_number] => 16/643331 [patent_app_country] => US [patent_app_date] => 2018-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 100 [patent_figures_cnt] => 114 [patent_no_of_words] => 45717 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16643331 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/643331
Imaging element, laminated imaging element, and solid-state imaging device Jun 7, 2018 Issued
Array ( [id] => 17181588 [patent_doc_number] => 11158840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Organic light emitting display panel, method for manufacturing the same and display device thereof [patent_app_type] => utility [patent_app_number] => 16/330324 [patent_app_country] => US [patent_app_date] => 2018-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 6178 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16330324 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/330324
Organic light emitting display panel, method for manufacturing the same and display device thereof Jun 4, 2018 Issued
Array ( [id] => 16233918 [patent_doc_number] => 10741481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Integrated package assembly for switching regulator [patent_app_type] => utility [patent_app_number] => 15/996774 [patent_app_country] => US [patent_app_date] => 2018-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4807 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15996774 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/996774
Integrated package assembly for switching regulator Jun 3, 2018 Issued
Array ( [id] => 17818683 [patent_doc_number] => 11424307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Organic light-emitting diode apparatus with color film shielding layer, fabrication method thereof, display panel, and display apparatus [patent_app_type] => utility [patent_app_number] => 16/333034 [patent_app_country] => US [patent_app_date] => 2018-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6015 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16333034 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/333034
Organic light-emitting diode apparatus with color film shielding layer, fabrication method thereof, display panel, and display apparatus May 29, 2018 Issued
Array ( [id] => 14238759 [patent_doc_number] => 20190131552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => FLEXIBLE SUBSTRATE, MANUFACTURING METHOD OF THE SAME, FLEXIBLE DISPLAY SUBSTRATE AND MANUFACTURING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 15/988700 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15988700 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/988700
Flexible substrate, manufacturing method of the same, flexible display substrate and manufacturing method of the same May 23, 2018 Issued
Array ( [id] => 15015571 [patent_doc_number] => 10453946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Semiconductor device and an electronic device [patent_app_type] => utility [patent_app_number] => 15/977556 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 51 [patent_no_of_words] => 28419 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 593 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977556 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/977556
Semiconductor device and an electronic device May 10, 2018 Issued
Array ( [id] => 13571373 [patent_doc_number] => 20180337234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 15/976070 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976070 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976070
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR May 9, 2018 Abandoned
Array ( [id] => 15093369 [patent_doc_number] => 20190341496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => NANOSHEET SUBSTRATE ISOLATION SCHEME BY LATTICE MATCHED WIDE BANDGAP SEMICONDUCTOR [patent_app_type] => utility [patent_app_number] => 15/973043 [patent_app_country] => US [patent_app_date] => 2018-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5885 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15973043 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/973043
Nanosheet substrate isolation scheme by lattice matched wide bandgap semiconductor May 6, 2018 Issued
Array ( [id] => 14151855 [patent_doc_number] => 10256317 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Vertical transistor gated diode [patent_app_type] => utility [patent_app_number] => 15/956477 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 42 [patent_no_of_words] => 7649 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956477 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956477
Vertical transistor gated diode Apr 17, 2018 Issued
Array ( [id] => 13364093 [patent_doc_number] => 20180233586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => SEMICONDUCTOR ARRANGEMENT WITH SUBSTRATE ISOLATION [patent_app_type] => utility [patent_app_number] => 15/953920 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15953920 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/953920
Semiconductor arrangement with substrate isolation Apr 15, 2018 Issued
Array ( [id] => 15389159 [patent_doc_number] => 10535784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-14 [patent_title] => Dual stack varactor [patent_app_type] => utility [patent_app_number] => 15/901061 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5335 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901061 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901061
Dual stack varactor Feb 20, 2018 Issued
Array ( [id] => 12849157 [patent_doc_number] => 20180174892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLATION REGION [patent_app_type] => utility [patent_app_number] => 15/899636 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899636 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/899636
High resistivity silicon-on-insulator substrate comprising an isolation region Feb 19, 2018 Issued
Array ( [id] => 14079517 [patent_doc_number] => 20190088646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => E-FUSE FOR USE IN SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/896647 [patent_app_country] => US [patent_app_date] => 2018-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15896647 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/896647
E-FUSE FOR USE IN SEMICONDUCTOR DEVICE Feb 13, 2018 Abandoned
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