
Nilufa Rahim
Examiner (ID: 1665, Phone: (571)272-8926 , Office: P/2893 )
| Most Active Art Unit | 2893 |
| Art Unit(s) | 2893, RD00 |
| Total Applications | 618 |
| Issued Applications | 451 |
| Pending Applications | 99 |
| Abandoned Applications | 80 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
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