
Nina Nmn Bhat
Examiner (ID: 2197, Phone: (571)272-1397 , Office: P/3649 )
| Most Active Art Unit | 1761 |
| Art Unit(s) | 1761, 1764, 1771, 3649, 1754, 1809, 1797, 1312, 2204, 1801, 2203 |
| Total Applications | 3486 |
| Issued Applications | 2769 |
| Pending Applications | 205 |
| Abandoned Applications | 519 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19392957
[patent_doc_number] => 20240282827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => FIELD PLATE BIASING OF HIGH ELECTRON MOBILITY TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 18/172916
[patent_app_country] => US
[patent_app_date] => 2023-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5817
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172916
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/172916 | FIELD PLATE BIASING OF HIGH ELECTRON MOBILITY TRANSISTOR | Feb 21, 2023 | Pending |
Array
(
[id] => 19131001
[patent_doc_number] => 20240136354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => INTEGRATED CIRCUIT DEVICES INCLUDING STACKED FIELD EFFECT TRANSISTORS AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/171754
[patent_app_country] => US
[patent_app_date] => 2023-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9624
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171754
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/171754 | Integrated circuit devices including stacked field effect transistors and methods of forming the same | Feb 20, 2023 | Issued |
Array
(
[id] => 19261063
[patent_doc_number] => 12021130
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Circuit structure with gate configuration
[patent_app_type] => utility
[patent_app_number] => 18/171128
[patent_app_country] => US
[patent_app_date] => 2023-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 9673
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171128
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/171128 | Circuit structure with gate configuration | Feb 16, 2023 | Issued |
Array
(
[id] => 19294680
[patent_doc_number] => 12034045
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-09
[patent_title] => Semiconductor device structure with nanostructure
[patent_app_type] => utility
[patent_app_number] => 18/171091
[patent_app_country] => US
[patent_app_date] => 2023-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 43
[patent_no_of_words] => 9483
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171091
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/171091 | Semiconductor device structure with nanostructure | Feb 16, 2023 | Issued |
Array
(
[id] => 18898819
[patent_doc_number] => 20240014304
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/170104
[patent_app_country] => US
[patent_app_date] => 2023-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170104
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/170104 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Feb 15, 2023 | Pending |
Array
(
[id] => 19063269
[patent_doc_number] => 11942523
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-26
[patent_title] => Semiconductor devices and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 18/168422
[patent_app_country] => US
[patent_app_date] => 2023-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 55
[patent_no_of_words] => 11724
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168422
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/168422 | Semiconductor devices and methods of forming the same | Feb 12, 2023 | Issued |
Array
(
[id] => 19314544
[patent_doc_number] => 12040371
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Multi-layer channel structures and methods of fabricating the same in field-effect transistors preliminary class
[patent_app_type] => utility
[patent_app_number] => 18/168338
[patent_app_country] => US
[patent_app_date] => 2023-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 67
[patent_no_of_words] => 9814
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168338
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/168338 | Multi-layer channel structures and methods of fabricating the same in field-effect transistors preliminary class | Feb 12, 2023 | Issued |
Array
(
[id] => 19055025
[patent_doc_number] => 20240096994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => MULTIPLE GATE PATTERNING METHODS TOWARDS FUTURE NANOSHEET SCALING
[patent_app_type] => utility
[patent_app_number] => 18/167718
[patent_app_country] => US
[patent_app_date] => 2023-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11545
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167718
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/167718 | MULTIPLE GATE PATTERNING METHODS TOWARDS FUTURE NANOSHEET SCALING | Feb 9, 2023 | Pending |
Array
(
[id] => 18440267
[patent_doc_number] => 20230187562
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => TRANSISTOR, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 18/165936
[patent_app_country] => US
[patent_app_date] => 2023-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9639
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165936
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/165936 | Transistor, integrated circuit, and manufacturing method of transistor | Feb 7, 2023 | Issued |
Array
(
[id] => 18774565
[patent_doc_number] => 20230369396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-16
[patent_title] => FIELD EFFECT TRANSISTOR WITH DUAL LAYER ISOLATION STRUCTURE AND METHOD
[patent_app_type] => utility
[patent_app_number] => 18/165853
[patent_app_country] => US
[patent_app_date] => 2023-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10740
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165853
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/165853 | FIELD EFFECT TRANSISTOR WITH DUAL LAYER ISOLATION STRUCTURE AND METHOD | Feb 6, 2023 | Pending |
Array
(
[id] => 18394976
[patent_doc_number] => 20230163197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => Semiconductor Device and Method of Manufacture
[patent_app_type] => utility
[patent_app_number] => 18/158641
[patent_app_country] => US
[patent_app_date] => 2023-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26519
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158641
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/158641 | Semiconductor Device and Method of Manufacture | Jan 23, 2023 | Pending |
Array
(
[id] => 18848852
[patent_doc_number] => 20230411256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGING MEMBER, SEMICONDUCTOR PACKAGING MEMBER AND MOUNTING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/099933
[patent_app_country] => US
[patent_app_date] => 2023-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5906
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099933
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/099933 | Manufacturing method of semiconductor packaging member, semiconductor packaging member and mounting method thereof | Jan 20, 2023 | Issued |
Array
(
[id] => 20332842
[patent_doc_number] => 12463127
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-04
[patent_title] => Integrated circuit (IC) package employing a re-distribution layer (RDL) substrate(s) with photosensitive dielectric layer(s) for increased package rigidity, and related fabrication methods
[patent_app_type] => utility
[patent_app_number] => 18/155398
[patent_app_country] => US
[patent_app_date] => 2023-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 44
[patent_no_of_words] => 10152
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155398
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/155398 | Integrated circuit (IC) package employing a re-distribution layer (RDL) substrate(s) with photosensitive dielectric layer(s) for increased package rigidity, and related fabrication methods | Jan 16, 2023 | Issued |
Array
(
[id] => 19191650
[patent_doc_number] => 20240170563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => Dielectric Layer for Nanosheet Protection and Method of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 18/154975
[patent_app_country] => US
[patent_app_date] => 2023-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9039
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154975
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/154975 | Dielectric Layer for Nanosheet Protection and Method of Forming the Same | Jan 15, 2023 | Pending |
Array
(
[id] => 19206403
[patent_doc_number] => 20240178302
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-30
[patent_title] => SEMICONDUCTOR DEVICE WITH PROTECTIVE GATE STRUCTURE AND METHODS OF FABRICATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/097274
[patent_app_country] => US
[patent_app_date] => 2023-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10974
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097274
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/097274 | SEMICONDUCTOR DEVICE WITH PROTECTIVE GATE STRUCTURE AND METHODS OF FABRICATION THEREOF | Jan 14, 2023 | Pending |
Array
(
[id] => 20457502
[patent_doc_number] => 12520574
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-06
[patent_title] => Semiconductor device structure including forksheet transistors and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 18/097263
[patent_app_country] => US
[patent_app_date] => 2023-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 49
[patent_no_of_words] => 7803
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097263
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/097263 | Semiconductor device structure including forksheet transistors and methods of forming the same | Jan 14, 2023 | Issued |
Array
(
[id] => 19101186
[patent_doc_number] => 20240120414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-11
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/097250
[patent_app_country] => US
[patent_app_date] => 2023-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8297
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097250
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/097250 | SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME | Jan 14, 2023 | Pending |
Array
(
[id] => 19582680
[patent_doc_number] => 12148810
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => Semiconductor device and method
[patent_app_type] => utility
[patent_app_number] => 18/154087
[patent_app_country] => US
[patent_app_date] => 2023-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 68
[patent_no_of_words] => 13900
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154087
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/154087 | Semiconductor device and method | Jan 12, 2023 | Issued |
Array
(
[id] => 19046875
[patent_doc_number] => 11935995
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-19
[patent_title] => Light emitting device
[patent_app_type] => utility
[patent_app_number] => 18/153347
[patent_app_country] => US
[patent_app_date] => 2023-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 8363
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153347
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/153347 | Light emitting device | Jan 10, 2023 | Issued |
Array
(
[id] => 18789571
[patent_doc_number] => 20230378264
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-23
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/091603
[patent_app_country] => US
[patent_app_date] => 2022-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14823
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091603
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/091603 | Semiconductor device | Dec 29, 2022 | Issued |