Search

Nina Nmn Bhat

Examiner (ID: 12197, Phone: (571)272-1397 , Office: P/3649 )

Most Active Art Unit
1761
Art Unit(s)
3649, 1754, 1761, 2204, 1801, 1764, 1771, 1312, 1797, 2203, 1809
Total Applications
3486
Issued Applications
2769
Pending Applications
205
Abandoned Applications
519

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17970076 [patent_doc_number] => 11487609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Separating parity data from host data in a memory sub-system [patent_app_type] => utility [patent_app_number] => 17/375301 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375301 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375301
Separating parity data from host data in a memory sub-system Jul 13, 2021 Issued
Array ( [id] => 18136060 [patent_doc_number] => 11561736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/370535 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 15082 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 388 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370535 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370535
Memory system Jul 7, 2021 Issued
Array ( [id] => 18454892 [patent_doc_number] => 20230196173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => MULTI-EXPONENTIAL ERROR EXTRAPOLATION [patent_app_type] => utility [patent_app_number] => 17/926146 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17926146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/926146
Multi-exponential error extrapolation Jun 30, 2021 Issued
Array ( [id] => 17484422 [patent_doc_number] => 20220091926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => PERFORMING A CYCLIC REDUNDANCY CHECKSUM OPERATION RESPONSIVE TO A USER-LEVEL INSTRUCTION [patent_app_type] => utility [patent_app_number] => 17/359537 [patent_app_country] => US [patent_app_date] => 2021-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359537
Performing a cyclic redundancy checksum operation responsive to a user-level instruction Jun 25, 2021 Issued
Array ( [id] => 17494144 [patent_doc_number] => 11283468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-22 [patent_title] => Log-likelihood ratio mapping tables in flash storage systems [patent_app_type] => utility [patent_app_number] => 17/357328 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7028 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357328
Log-likelihood ratio mapping tables in flash storage systems Jun 23, 2021 Issued
Array ( [id] => 17824537 [patent_doc_number] => 11429485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-30 [patent_title] => Memories with end-to-end data protection using physical location check [patent_app_type] => utility [patent_app_number] => 17/357759 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357759 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357759
Memories with end-to-end data protection using physical location check Jun 23, 2021 Issued
Array ( [id] => 18130215 [patent_doc_number] => 11556424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Non-volatile storage device having fast boot code transfer with low speed fallback [patent_app_type] => utility [patent_app_number] => 17/340027 [patent_app_country] => US [patent_app_date] => 2021-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 13349 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340027
Non-volatile storage device having fast boot code transfer with low speed fallback Jun 5, 2021 Issued
Array ( [id] => 17977403 [patent_doc_number] => 11494263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/333913 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 8301 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/333913
Controller and method of operating the same May 27, 2021 Issued
Array ( [id] => 18030502 [patent_doc_number] => 11513689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Dedicated interface for coupling flash memory and dynamic random access memory [patent_app_type] => utility [patent_app_number] => 17/328454 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328454 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328454
Dedicated interface for coupling flash memory and dynamic random access memory May 23, 2021 Issued
Array ( [id] => 18506376 [patent_doc_number] => 11704193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-07-18 [patent_title] => Memory scrub using memory controller [patent_app_type] => utility [patent_app_number] => 17/325953 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325953 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325953
Memory scrub using memory controller May 19, 2021 Issued
Array ( [id] => 17977402 [patent_doc_number] => 11494262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Electronic device having one-time-programmable (OTP) memory and method for writing and reading OTP memory [patent_app_type] => utility [patent_app_number] => 17/324638 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3130 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324638
Electronic device having one-time-programmable (OTP) memory and method for writing and reading OTP memory May 18, 2021 Issued
Array ( [id] => 17068678 [patent_doc_number] => 20210270893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => INTEGRATED COMMUNICATION LINK TESTING [patent_app_type] => utility [patent_app_number] => 17/324007 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16554 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324007
Integrated communication link testing May 17, 2021 Issued
Array ( [id] => 18131850 [patent_doc_number] => 11558068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Method and apparatus for encoding polar code concatenated with CRC code [patent_app_type] => utility [patent_app_number] => 17/322451 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 16882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322451
Method and apparatus for encoding polar code concatenated with CRC code May 16, 2021 Issued
Array ( [id] => 17100874 [patent_doc_number] => 20210288665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => INTEGRATED CIRCUIT FOR RECEPTION APPARATUS [patent_app_type] => utility [patent_app_number] => 17/322541 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17322541 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/322541
Integrated circuit for reception apparatus May 16, 2021 Issued
Array ( [id] => 17446366 [patent_doc_number] => 20220066871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 17/314716 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314716
Integrated circuit and method of operating same May 6, 2021 Issued
Array ( [id] => 17327135 [patent_doc_number] => 11218166 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-01-04 [patent_title] => Early convergence for decoding of LDPC codes [patent_app_type] => utility [patent_app_number] => 17/306057 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 7491 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/306057
Early convergence for decoding of LDPC codes May 2, 2021 Issued
Array ( [id] => 18357684 [patent_doc_number] => 11646090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => DRAM retention test method for dynamic error correction [patent_app_type] => utility [patent_app_number] => 17/245491 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 38 [patent_no_of_words] => 20269 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245491 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/245491
DRAM retention test method for dynamic error correction Apr 29, 2021 Issued
Array ( [id] => 18356747 [patent_doc_number] => 11645148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Method and apparatus for caching MTE and/or ECC data [patent_app_type] => utility [patent_app_number] => 17/243172 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4775 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243172 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/243172
Method and apparatus for caching MTE and/or ECC data Apr 27, 2021 Issued
Array ( [id] => 17157917 [patent_doc_number] => 20210318968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => TRAINING PROCEDURE FOR RECEIVERS ASSOCIATED WITH A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/241869 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241869
Training procedure for receivers associated with a memory device Apr 26, 2021 Issued
Array ( [id] => 17024164 [patent_doc_number] => 20210248035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => STORAGE DEVICE USING HOST MEMORY AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/239621 [patent_app_country] => US [patent_app_date] => 2021-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239621
Storage device using host memory and operating method thereof Apr 24, 2021 Issued
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