Search

Nina Nmn Bhat

Examiner (ID: 2197, Phone: (571)272-1397 , Office: P/3649 )

Most Active Art Unit
1761
Art Unit(s)
1761, 1764, 1771, 3649, 1754, 1809, 1797, 1312, 2204, 1801, 2203
Total Applications
3486
Issued Applications
2769
Pending Applications
205
Abandoned Applications
519

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18331931 [patent_doc_number] => 11637189 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-25 [patent_title] => Semiconductor structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 17/932394 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 9135 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932394 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932394
Semiconductor structure and forming method thereof Sep 14, 2022 Issued
Array ( [id] => 18488578 [patent_doc_number] => 20230215926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING SINGLE SLURRY CHEMICAL MECHANICAL POLISHING (CMP) PROCESS [patent_app_type] => utility [patent_app_number] => 17/930145 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17930145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/930145
Method of manufacturing semiconductor device using single slurry chemical mechanical polishing (CMP) process Sep 6, 2022 Issued
Array ( [id] => 18097544 [patent_doc_number] => 20220415885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 17/902537 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17902537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/902537
Semiconductor integrated circuit device Sep 1, 2022 Issued
Array ( [id] => 19024906 [patent_doc_number] => 20240081077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => TRANSISTOR, MEMORY DEVICE AND MANUFACTURING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/901777 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901777 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901777
Transistor, memory device and manufacturing method of memory device Aug 31, 2022 Issued
Array ( [id] => 20111542 [patent_doc_number] => 12362278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Transistors with dual power and signal lines [patent_app_type] => utility [patent_app_number] => 17/900398 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 2209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900398 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900398
Transistors with dual power and signal lines Aug 30, 2022 Issued
Array ( [id] => 20307159 [patent_doc_number] => 12453170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Integration of nanosheets with bottom dielectric isolation and ideal diode [patent_app_type] => utility [patent_app_number] => 17/894827 [patent_app_country] => US [patent_app_date] => 2022-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 65 [patent_no_of_words] => 9828 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894827 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/894827
Integration of nanosheets with bottom dielectric isolation and ideal diode Aug 23, 2022 Issued
Array ( [id] => 20205583 [patent_doc_number] => 12408379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/890547 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 8321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890547 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890547
Semiconductor device and method of fabricating the same Aug 17, 2022 Issued
Array ( [id] => 18991305 [patent_doc_number] => 20240063274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SOURCE OR DRAIN STRUCTURES WITH PHOSPHOROUS AND ARSENIC DOPANTS [patent_app_type] => utility [patent_app_number] => 17/889986 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889986 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889986
SOURCE OR DRAIN STRUCTURES WITH PHOSPHOROUS AND ARSENIC DOPANTS Aug 16, 2022 Pending
Array ( [id] => 19314502 [patent_doc_number] => 12040328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor devices including two-dimensional material and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 17/884772 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 80 [patent_no_of_words] => 11285 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884772 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884772
Semiconductor devices including two-dimensional material and methods of fabrication thereof Aug 9, 2022 Issued
Array ( [id] => 19123599 [patent_doc_number] => 11967594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Semiconductor device structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/884840 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9807 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884840 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884840
Semiconductor device structure and methods of forming the same Aug 9, 2022 Issued
Array ( [id] => 18040217 [patent_doc_number] => 20220384434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => SEMICONDUCTOR DEVICE HAVING NANOSHEET TRANSISTOR AND METHODS OF FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/883971 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/883971
Semiconductor device having nanosheet transistor and methods of fabrication thereof Aug 8, 2022 Issued
Array ( [id] => 18959035 [patent_doc_number] => 20240047362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => Memory Circuitry And Method Used In Forming Memory Circuitry [patent_app_type] => utility [patent_app_number] => 17/881308 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881308 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881308
Memory circuitry and method used in forming memory circuitry Aug 3, 2022 Issued
Array ( [id] => 19958480 [patent_doc_number] => 12328911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/878936 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 3222 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878936 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878936
Semiconductor device Aug 1, 2022 Issued
Array ( [id] => 19139494 [patent_doc_number] => 11974487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/878067 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 17978 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878067
Display device Jul 31, 2022 Issued
Array ( [id] => 19124811 [patent_doc_number] => 11968819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Gate-all-around field-effect transistors in integrated circuits [patent_app_type] => utility [patent_app_number] => 17/877050 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 14324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877050 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877050
Gate-all-around field-effect transistors in integrated circuits Jul 28, 2022 Issued
Array ( [id] => 18008917 [patent_doc_number] => 20220367684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => ISOLATION STRUCTURES IN MULTI-GATE SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/815913 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815913
Isolation structures in multi-gate semiconductor devices and methods of fabricating the same Jul 27, 2022 Issued
Array ( [id] => 18255521 [patent_doc_number] => 20230082560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/873575 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873575
Display device Jul 25, 2022 Issued
Array ( [id] => 19094066 [patent_doc_number] => 11955533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Ion implantation to reduce nanosheet gate length variation [patent_app_type] => utility [patent_app_number] => 17/873380 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 3065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873380 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873380
Ion implantation to reduce nanosheet gate length variation Jul 25, 2022 Issued
Array ( [id] => 18874769 [patent_doc_number] => 11862592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Sidewall spacer to reduce bond pad necking and/or redistribution layer necking [patent_app_type] => utility [patent_app_number] => 17/869850 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869850 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869850
Sidewall spacer to reduce bond pad necking and/or redistribution layer necking Jul 20, 2022 Issued
Array ( [id] => 19168489 [patent_doc_number] => 11984402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 17/870531 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 54 [patent_no_of_words] => 15775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870531 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/870531
Semiconductor device and method Jul 20, 2022 Issued
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