
Nina Nmn Bhat
Examiner (ID: 6908, Phone: (571)272-1397 , Office: P/3649 )
| Most Active Art Unit | 1761 |
| Art Unit(s) | 1771, 3649, 2203, 1801, 1797, 1809, 1312, 1761, 1764, 1754, 2204 |
| Total Applications | 3486 |
| Issued Applications | 2768 |
| Pending Applications | 205 |
| Abandoned Applications | 519 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8550598
[patent_doc_number] => 08325486
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-12-04
[patent_title] => 'Tamper respondent module'
[patent_app_type] => utility
[patent_app_number] => 12/686492
[patent_app_country] => US
[patent_app_date] => 2010-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7986
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12686492
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/686492 | Tamper respondent module | Jan 12, 2010 | Issued |
Array
(
[id] => 9167013
[patent_doc_number] => 08592691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-26
[patent_title] => 'Printed wiring board'
[patent_app_type] => utility
[patent_app_number] => 12/685731
[patent_app_country] => US
[patent_app_date] => 2010-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 5921
[patent_no_of_claims] => 7
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[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12685731
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/685731 | Printed wiring board | Jan 11, 2010 | Issued |
Array
(
[id] => 8365071
[patent_doc_number] => 08254146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-28
[patent_title] => 'Detachable capacitor device'
[patent_app_type] => utility
[patent_app_number] => 12/684977
[patent_app_country] => US
[patent_app_date] => 2010-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2666
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12684977
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/684977 | Detachable capacitor device | Jan 10, 2010 | Issued |
Array
(
[id] => 6151582
[patent_doc_number] => 20110155436
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-30
[patent_title] => 'CONDUCTIVE SUBSTRATE STRUCTURE WITH CONDUCTIVE CHANNELS FORMED BY USING A TWO-SIDED CUT APPROACH AND A METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/649824
[patent_app_country] => US
[patent_app_date] => 2009-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3617
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20110155436.pdf
[firstpage_image] =>[orig_patent_app_number] => 12649824
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/649824 | Conductive substrate structure with conductive channels formed by using a two-sided cut approach and a method for manufacturing the same | Dec 29, 2009 | Issued |
Array
(
[id] => 6199124
[patent_doc_number] => 20110061910
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-17
[patent_title] => 'MULTI-LAYER CERAMIC CIRCUIT BOARD, METHOD OF MANUFACTURING THE SAME, AND ELECTRIC DEVICE MODULE USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/648201
[patent_app_country] => US
[patent_app_date] => 2009-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3709
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[pdf_file] => publications/A1/0061/20110061910.pdf
[firstpage_image] =>[orig_patent_app_number] => 12648201
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/648201 | MULTI-LAYER CERAMIC CIRCUIT BOARD, METHOD OF MANUFACTURING THE SAME, AND ELECTRIC DEVICE MODULE USING THE SAME | Dec 27, 2009 | Abandoned |
Array
(
[id] => 6488460
[patent_doc_number] => 20100200279
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-12
[patent_title] => 'ELECTRONIC COMPONENT MOUNTING SUBSTRATE AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT MOUNTING SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/647015
[patent_app_country] => US
[patent_app_date] => 2009-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 12846
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12647015
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/647015 | Electronic component mounting substrate and method for manufacturing electronic component mounting substrate | Dec 23, 2009 | Issued |
Array
(
[id] => 8234064
[patent_doc_number] => 08199515
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-12
[patent_title] => 'DIMM riser card with an angled DIMM socket and a straddled mount DIMM socket'
[patent_app_type] => utility
[patent_app_number] => 12/644558
[patent_app_country] => US
[patent_app_date] => 2009-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4666
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/199/08199515.pdf
[firstpage_image] =>[orig_patent_app_number] => 12644558
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/644558 | DIMM riser card with an angled DIMM socket and a straddled mount DIMM socket | Dec 21, 2009 | Issued |
Array
(
[id] => 6066614
[patent_doc_number] => 20110042130
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'Multilayered wiring substrate and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/654529
[patent_app_country] => US
[patent_app_date] => 2009-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4432
[patent_no_of_claims] => 14
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20110042130.pdf
[firstpage_image] =>[orig_patent_app_number] => 12654529
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/654529 | Multilayered wiring substrate and manufacturing method thereof | Dec 21, 2009 | Abandoned |
Array
(
[id] => 8785854
[patent_doc_number] => 08432706
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-30
[patent_title] => 'Printed circuit board and electro application'
[patent_app_type] => utility
[patent_app_number] => 12/654541
[patent_app_country] => US
[patent_app_date] => 2009-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 4197
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12654541
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/654541 | Printed circuit board and electro application | Dec 21, 2009 | Issued |
Array
(
[id] => 5962180
[patent_doc_number] => 20110147069
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'Multi-tiered Circuit Board and Method of Manufacture'
[patent_app_type] => utility
[patent_app_number] => 12/642020
[patent_app_country] => US
[patent_app_date] => 2009-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3440
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[pdf_file] => publications/A1/0147/20110147069.pdf
[firstpage_image] =>[orig_patent_app_number] => 12642020
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/642020 | Multi-tiered Circuit Board and Method of Manufacture | Dec 17, 2009 | Abandoned |
Array
(
[id] => 6199120
[patent_doc_number] => 20110061906
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-17
[patent_title] => 'Printed circuit board and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/654433
[patent_app_country] => US
[patent_app_date] => 2009-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0061/20110061906.pdf
[firstpage_image] =>[orig_patent_app_number] => 12654433
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/654433 | Printed circuit board and fabrication method thereof | Dec 17, 2009 | Abandoned |
Array
(
[id] => 5962170
[patent_doc_number] => 20110147059
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'Substrate for integrated circuit devices including multi-layer glass core and methods of making the same'
[patent_app_type] => utility
[patent_app_number] => 12/653722
[patent_app_country] => US
[patent_app_date] => 2009-12-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0147/20110147059.pdf
[firstpage_image] =>[orig_patent_app_number] => 12653722
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/653722 | Substrate for integrated circuit devices including multi-layer glass core and methods of making the same | Dec 16, 2009 | Issued |
Array
(
[id] => 8306171
[patent_doc_number] => 08227708
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-24
[patent_title] => 'Via structure integrated in electronic substrate'
[patent_app_type] => utility
[patent_app_number] => 12/637104
[patent_app_country] => US
[patent_app_date] => 2009-12-14
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12637104
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/637104 | Via structure integrated in electronic substrate | Dec 13, 2009 | Issued |
Array
(
[id] => 8819875
[patent_doc_number] => 20130120920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'Scalable up and down nesting integrated electronic enclosures with form factors including asteroids and/or dumbbells and/or approximated tessellation(s)/tiling(s) or combinations thereof with thermal management, wiring, sliding fit, manual and/or automated full range vertical to horizontal positioning, access and structural systems for individual modules and intra-and inter-planar stacks, columns, rows, arrays and associated infrastructures'
[patent_app_type] => utility
[patent_app_number] => 12/806211
[patent_app_country] => US
[patent_app_date] => 2009-12-10
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12806211
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/806211 | Scalable up and down nesting integrated electronic enclosures with form factors including asteroids and/or dumbbells and/or approximated tessellation(s)/tiling(s) or combinations thereof with thermal management, wiring, sliding fit, manual and/or automated full range vertical to horizontal positioning, access and structural systems for individual modules and intra-and inter-planar stacks, columns, rows, arrays and associated infrastructures | Dec 9, 2009 | Issued |
Array
(
[id] => 6348025
[patent_doc_number] => 20100085720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-08
[patent_title] => 'JOINED STRUCTURE, METHOD FOR PRODUCING THE SAME, AND ANISOTROPIC CONDUCTIVE FILM USED FOR THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/633993
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/633993 | JOINED STRUCTURE, METHOD FOR PRODUCING THE SAME, AND ANISOTROPIC CONDUCTIVE FILM USED FOR THE SAME | Dec 8, 2009 | Abandoned |
Array
(
[id] => 6026198
[patent_doc_number] => 20110079421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-07
[patent_title] => 'PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/634520 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME | Dec 8, 2009 | Abandoned |
Array
(
[id] => 6123268
[patent_doc_number] => 20110085311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-14
[patent_title] => 'Apparatus and Method for Vertically-Structured Passive Components'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/631649 | Apparatus and method for vertically-structured passive components | Dec 3, 2009 | Issued |
Array
(
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[patent_issue_date] => 2014-04-15
[patent_title] => 'Method of producing circuit board, and circuit board obtained using the manufacturing method'
[patent_app_type] => utility
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Array
(
[id] => 6238629
[patent_doc_number] => 20100132992
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[patent_kind] => A1
[patent_issue_date] => 2010-06-03
[patent_title] => 'DEVICE MOUNTING BOARD AND SEMICONDUCTOR MODULE'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/626807 | Device mounting board and semiconductor module | Nov 26, 2009 | Issued |
Array
(
[id] => 5999167
[patent_doc_number] => 20110116242
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[patent_kind] => A1
[patent_issue_date] => 2011-05-19
[patent_title] => 'TAMPER EVIDENT PCBA FILM'
[patent_app_type] => utility
[patent_app_number] => 12/621260
[patent_app_country] => US
[patent_app_date] => 2009-11-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/621260 | TAMPER EVIDENT PCBA FILM | Nov 17, 2009 | Abandoned |