
Nirav G. Patel
Examiner (ID: 13976, Phone: (571)270-5812 , Office: P/2665 )
| Most Active Art Unit | 2665 |
| Art Unit(s) | OPA, 2665, 2663, 2624 |
| Total Applications | 710 |
| Issued Applications | 598 |
| Pending Applications | 3 |
| Abandoned Applications | 113 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7033865
[patent_doc_number] => 20050032375
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-10
[patent_title] => 'Methods for electrochemically fabricating structures using adhered masks, incorporating dielectric sheets, and/or seed layers that are partially removed via planarization'
[patent_app_type] => utility
[patent_app_number] => 10/841300
[patent_app_country] => US
[patent_app_date] => 2004-05-07
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 24
[patent_no_of_words] => 28289
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
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[pdf_file] => publications/A1/0032/20050032375.pdf
[firstpage_image] =>[orig_patent_app_number] => 10841300
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/841300 | Methods for electrochemically fabricating structures using adhered masks, incorporating dielectric sheets, and/or seed layers that are partially removed via planarization | May 6, 2004 | Abandoned |
Array
(
[id] => 7272659
[patent_doc_number] => 20040232110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-25
[patent_title] => 'Selective etching method'
[patent_app_type] => new
[patent_app_number] => 10/839990
[patent_app_country] => US
[patent_app_date] => 2004-05-06
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[pdf_file] => publications/A1/0232/20040232110.pdf
[firstpage_image] =>[orig_patent_app_number] => 10839990
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/839990 | Selective etching method | May 5, 2004 | Issued |
Array
(
[id] => 445082
[patent_doc_number] => 07252778
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-07
[patent_title] => 'Etching method and etching device'
[patent_app_type] => utility
[patent_app_number] => 10/839404
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[firstpage_image] =>[orig_patent_app_number] => 10839404
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/839404 | Etching method and etching device | May 4, 2004 | Issued |
Array
(
[id] => 6950326
[patent_doc_number] => 20050225420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Deep submicron CMOS compatible suspending inductor'
[patent_app_type] => utility
[patent_app_number] => 10/820396
[patent_app_country] => US
[patent_app_date] => 2004-04-08
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[firstpage_image] =>[orig_patent_app_number] => 10820396
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/820396 | Deep submicron CMOS compatible suspending inductor | Apr 7, 2004 | Issued |
Array
(
[id] => 7313776
[patent_doc_number] => 20040222190
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[patent_issue_date] => 2004-11-11
[patent_title] => 'Plasma processing method'
[patent_app_type] => new
[patent_app_number] => 10/813012
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[firstpage_image] =>[orig_patent_app_number] => 10813012
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/813012 | Plasma processing method | Mar 30, 2004 | Abandoned |
Array
(
[id] => 7331875
[patent_doc_number] => 20040187896
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[patent_issue_date] => 2004-09-30
[patent_title] => 'Substrate processing method and apparatus'
[patent_app_type] => new
[patent_app_number] => 10/812102
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[firstpage_image] =>[orig_patent_app_number] => 10812102
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/812102 | Substrate processing method and apparatus | Mar 29, 2004 | Issued |
Array
(
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[patent_title] => 'Process for increasing strength, flexibility and fatigue life of metals'
[patent_app_type] => utility
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[pdf_file] => publications/A1/0082/20050082259.pdf
[firstpage_image] =>[orig_patent_app_number] => 10809989
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809989 | Process for increasing strength, flexibility and fatigue life of metals | Mar 25, 2004 | Issued |
Array
(
[id] => 6955297
[patent_doc_number] => 20050211667
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[patent_issue_date] => 2005-09-29
[patent_title] => 'Method and apparatus for measurement of thin films and residues on semiconductor substrates'
[patent_app_type] => utility
[patent_app_number] => 10/810209
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[patent_app_date] => 2004-03-26
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[firstpage_image] =>[orig_patent_app_number] => 10810209
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/810209 | Method and apparatus for measurement of thin films and residues on semiconductor substrates | Mar 25, 2004 | Abandoned |
Array
(
[id] => 6955299
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[patent_issue_date] => 2005-09-29
[patent_title] => 'Method and system of discriminating substrate type'
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[patent_app_number] => 10/809474
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809474 | Method and system of discriminating substrate type | Mar 25, 2004 | Issued |
Array
(
[id] => 7374054
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[patent_title] => 'Sloped trench etching process'
[patent_app_type] => new
[patent_app_number] => 10/809006
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[firstpage_image] =>[orig_patent_app_number] => 10809006
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809006 | Sloped trench etching process | Mar 23, 2004 | Abandoned |
Array
(
[id] => 7259868
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[patent_title] => 'Low loss SOI/CMOS compatible silicon waveguide and method of making the same'
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[pdf_file] => publications/A1/0240/20040240822.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/806738 | Low loss SOI/CMOS compatible silicon waveguide and method of making the same | Mar 22, 2004 | Issued |
Array
(
[id] => 7264169
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807052 | Substrate treating method and apparatus | Mar 22, 2004 | Abandoned |
Array
(
[id] => 151508
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[patent_title] => 'Dual doped polysilicon and silicon germanium etch'
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[firstpage_image] =>[orig_patent_app_number] => 10803342
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803342 | Dual doped polysilicon and silicon germanium etch | Mar 16, 2004 | Issued |
Array
(
[id] => 5038440
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[patent_title] => 'Micro parallel kinematic mechanism design and fabrication'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/548852 | Micro parallel kinematic mechanism design and fabrication | Mar 10, 2004 | Abandoned |
Array
(
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[patent_title] => 'Rapid generation of nanoparticles from bulk solids at room temperature'
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 10788899
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/788899 | Method of forming high aspect ratio structures | Feb 26, 2004 | Issued |
Array
(
[id] => 314460
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[patent_title] => 'Display device and method of manufacturing transparent substrate for display device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/786290 | Display device and method of manufacturing transparent substrate for display device | Feb 25, 2004 | Issued |
Array
(
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Array
(
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[patent_title] => 'Method of patterning transparent conductive film, thin film transistor substrate using the same and fabricating method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/774701 | Method of patterning transparent conductive film, thin film transistor substrate using the same and fabricating method thereof | Feb 9, 2004 | Issued |
| 90/006926 | INDUCTIVELY COUPLED PLASMA REACTOR AND PROCESS | Jan 27, 2004 | Issued |