Search

Nirav G. Patel

Examiner (ID: 11306, Phone: (571)270-5812 , Office: P/2665 )

Most Active Art Unit
2665
Art Unit(s)
2665, 2624, OPA, 2663
Total Applications
710
Issued Applications
598
Pending Applications
3
Abandoned Applications
113

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13910623 [patent_doc_number] => 20190044516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/148286 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16148286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/148286
Semiconductor device and method of driving semiconductor device Sep 30, 2018 Issued
Array ( [id] => 15062261 [patent_doc_number] => 10461445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Methods and devices for impedance multiplication [patent_app_type] => utility [patent_app_number] => 16/136124 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 44 [patent_no_of_words] => 10584 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16136124 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/136124
Methods and devices for impedance multiplication Sep 18, 2018 Issued
Array ( [id] => 13631143 [patent_doc_number] => 20180367124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => SYSTEMS AND METHODS FOR A ROBUST DOUBLE NODE UPSET TOLERANT LATCH [patent_app_type] => utility [patent_app_number] => 16/110137 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110137 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/110137
Systems and methods for a robust double node upset tolerant latch Aug 22, 2018 Issued
Array ( [id] => 16124159 [patent_doc_number] => 20200214102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => LIGHTING METHOD AND SYSTEM TO IMPROVE THE PERSPECTIVE COLOUR PERCEPTION OF AN IMAGE OBSERVED BY A USER [patent_app_type] => utility [patent_app_number] => 16/634882 [patent_app_country] => US [patent_app_date] => 2018-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16634882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/634882
Lighting method and system to improve the perspective colour perception of an image observed by a user Aug 16, 2018 Issued
Array ( [id] => 15137475 [patent_doc_number] => 10482209 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-19 [patent_title] => Field programmable operation block array [patent_app_type] => utility [patent_app_number] => 16/055242 [patent_app_country] => US [patent_app_date] => 2018-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7576 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16055242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/055242
Field programmable operation block array Aug 5, 2018 Issued
Array ( [id] => 14877277 [patent_doc_number] => 20190288880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => HIGH RESOLUTION VOLTAGE-MODE DRIVER [patent_app_type] => utility [patent_app_number] => 16/054902 [patent_app_country] => US [patent_app_date] => 2018-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16054902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/054902
High resolution voltage-mode driver Aug 2, 2018 Issued
Array ( [id] => 14770695 [patent_doc_number] => 10396760 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-27 [patent_title] => Differential pair contact resistance asymmetry compensation system [patent_app_type] => utility [patent_app_number] => 16/052879 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6544 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052879 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/052879
Differential pair contact resistance asymmetry compensation system Aug 1, 2018 Issued
Array ( [id] => 13573629 [patent_doc_number] => 20180338363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => Color temperature tuning [patent_app_type] => utility [patent_app_number] => 15/998257 [patent_app_country] => US [patent_app_date] => 2018-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15998257 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/998257
Color temperature tuning Jul 23, 2018 Abandoned
Array ( [id] => 15704897 [patent_doc_number] => 10608641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Hierarchical partial reconfiguration for programmable integrated circuits [patent_app_type] => utility [patent_app_number] => 16/041602 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 12427 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16041602 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/041602
Hierarchical partial reconfiguration for programmable integrated circuits Jul 19, 2018 Issued
Array ( [id] => 14708541 [patent_doc_number] => 10382040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => High voltage level shifting (HVLS) circuit and related semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/041640 [patent_app_country] => US [patent_app_date] => 2018-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6435 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16041640 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/041640
High voltage level shifting (HVLS) circuit and related semiconductor devices Jul 19, 2018 Issued
Array ( [id] => 14399239 [patent_doc_number] => 10312915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Dynamic decode circuit with active glitch control method [patent_app_type] => utility [patent_app_number] => 16/029604 [patent_app_country] => US [patent_app_date] => 2018-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029604 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029604
Dynamic decode circuit with active glitch control method Jul 7, 2018 Issued
Array ( [id] => 14399241 [patent_doc_number] => 10312916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Dynamic decode circuit with delayed precharge [patent_app_type] => utility [patent_app_number] => 16/029607 [patent_app_country] => US [patent_app_date] => 2018-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11194 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029607 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029607
Dynamic decode circuit with delayed precharge Jul 7, 2018 Issued
Array ( [id] => 14431139 [patent_doc_number] => 10320388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Dynamic decode circuit with active glitch control method [patent_app_type] => utility [patent_app_number] => 16/029603 [patent_app_country] => US [patent_app_date] => 2018-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11194 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029603 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029603
Dynamic decode circuit with active glitch control method Jul 7, 2018 Issued
Array ( [id] => 13631185 [patent_doc_number] => 20180367145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => DYNAMIC DECODE CIRCUIT WITH ACTIVE GLITCH CONTROL [patent_app_type] => utility [patent_app_number] => 16/029577 [patent_app_country] => US [patent_app_date] => 2018-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16029577 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/029577
Dynamic decode circuit with active glitch control Jul 6, 2018 Issued
Array ( [id] => 15219773 [patent_doc_number] => 20190372573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => Wires replacing transistors enabling light speed [patent_app_type] => utility [patent_app_number] => 16/024909 [patent_app_country] => US [patent_app_date] => 2018-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024909 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024909
Wires replacing transistors enabling light speed Jun 30, 2018 Abandoned
Array ( [id] => 15788151 [patent_doc_number] => 10627798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => FPGA functionality mode switch-over [patent_app_type] => utility [patent_app_number] => 16/024730 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4220 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024730 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024730
FPGA functionality mode switch-over Jun 28, 2018 Issued
Array ( [id] => 13781911 [patent_doc_number] => 20190004494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => HYSTERESIS CONTROL SYSTEMS AND METHODS FOR PROGRAMMABLE LOGIC DEVICES [patent_app_type] => utility [patent_app_number] => 16/020955 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020955 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020955
Hysteresis control systems and methods for programmable logic devices Jun 26, 2018 Issued
Array ( [id] => 13500777 [patent_doc_number] => 20180301931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => Solid-State Lighting System Operated With A High DC Voltage [patent_app_type] => utility [patent_app_number] => 16/014385 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 446 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014385 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014385
Solid-state lighting system operated with a high DC voltage Jun 20, 2018 Issued
Array ( [id] => 13998077 [patent_doc_number] => 20190068196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => Logic Unit Circuit and Pixel Driving Circuit [patent_app_type] => utility [patent_app_number] => 16/007472 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007472 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/007472
Logic unit circuit and pixel driving circuit Jun 12, 2018 Issued
Array ( [id] => 15186245 [patent_doc_number] => 20190363714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => IMPEDANCE-BASED PHYSICAL UNCLONABLE FUNCTION [patent_app_type] => utility [patent_app_number] => 15/987776 [patent_app_country] => US [patent_app_date] => 2018-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15987776 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/987776
Impedance-based physical unclonable function May 22, 2018 Issued
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