Search

Nishath Yasmeen

Examiner (ID: 15422, Phone: (571)270-7564 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
537
Issued Applications
389
Pending Applications
48
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12896524 [patent_doc_number] => 20180190683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/855053 [patent_app_country] => US [patent_app_date] => 2017-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15855053 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/855053
THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME Dec 26, 2017 Abandoned
Array ( [id] => 14920465 [patent_doc_number] => 10431559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Method for manufacturing a semiconductor structure [patent_app_type] => utility [patent_app_number] => 15/851572 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 62 [patent_no_of_words] => 8708 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851572 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/851572
Method for manufacturing a semiconductor structure Dec 20, 2017 Issued
Array ( [id] => 12738916 [patent_doc_number] => 20180138139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/851515 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851515 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/851515
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Dec 20, 2017 Abandoned
Array ( [id] => 13499681 [patent_doc_number] => 20180301383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/844534 [patent_app_country] => US [patent_app_date] => 2017-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15844534 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/844534
SEMICONDUCTOR DEVICE Dec 15, 2017 Abandoned
Array ( [id] => 12801499 [patent_doc_number] => 20180159002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 15/832004 [patent_app_country] => US [patent_app_date] => 2017-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/832004
Light-emitting device Dec 4, 2017 Issued
Array ( [id] => 14406353 [patent_doc_number] => 20190169020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => PACKAGE SUBSTRATE INTEGRATED DEVICES [patent_app_type] => utility [patent_app_number] => 15/832223 [patent_app_country] => US [patent_app_date] => 2017-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832223 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/832223
PACKAGE SUBSTRATE INTEGRATED DEVICES Dec 4, 2017 Abandoned
Array ( [id] => 12668659 [patent_doc_number] => 20180114719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => BARRIER PLANARIZATION FOR INTERCONNECT METALLIZATION [patent_app_type] => utility [patent_app_number] => 15/822542 [patent_app_country] => US [patent_app_date] => 2017-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15822542 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/822542
BARRIER PLANARIZATION FOR INTERCONNECT METALLIZATION Nov 26, 2017 Abandoned
Array ( [id] => 12780043 [patent_doc_number] => 20180151849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => ANISOTROPIC CONDUCTIVE FILM AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/816008 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816008 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816008
Anisotropic conductive film and display device including the same Nov 16, 2017 Issued
Array ( [id] => 14350435 [patent_doc_number] => 20190157190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => Power Package Having Multiple Mold Compounds [patent_app_type] => utility [patent_app_number] => 15/816090 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816090
Power package having multiple mold compounds Nov 16, 2017 Issued
Array ( [id] => 12668752 [patent_doc_number] => 20180114750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => SELECTIVE BLOCKING BOUNDARY PLACEMENT FOR CIRCUIT LOCATIONS REQUIRING ELECTROMIGRATION SHORT-LENGTH [patent_app_type] => utility [patent_app_number] => 15/816414 [patent_app_country] => US [patent_app_date] => 2017-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15816414 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/816414
Selective blocking boundary placement for circuit locations requiring electromigration short-length Nov 16, 2017 Issued
Array ( [id] => 17683404 [patent_doc_number] => 11367669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Power module and fabrication method of the same, graphite plate, and power supply equipment [patent_app_type] => utility [patent_app_number] => 15/813929 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 80 [patent_figures_cnt] => 145 [patent_no_of_words] => 57841 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813929 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813929
Power module and fabrication method of the same, graphite plate, and power supply equipment Nov 14, 2017 Issued
Array ( [id] => 12872860 [patent_doc_number] => 20180182795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/813833 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813833 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813833
Semiconductor device and method for fabricating the same Nov 14, 2017 Issued
Array ( [id] => 12896596 [patent_doc_number] => 20180190707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/813843 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813843 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813843
Image sensor and method of manufacturing the same Nov 14, 2017 Issued
Array ( [id] => 13306795 [patent_doc_number] => 20180204934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => METHODS RELATED TO A SEMICONDUCTOR STRUCTURE WITH GALLIUM ARSENIDE AND TANTALUM NITRIDE [patent_app_type] => utility [patent_app_number] => 15/809292 [patent_app_country] => US [patent_app_date] => 2017-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15809292 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/809292
Methods related to a semiconductor structure with gallium arsenide and tantalum nitride Nov 9, 2017 Issued
Array ( [id] => 13799475 [patent_doc_number] => 20190013276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/802131 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9490 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802131 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802131
Semiconductor device and method for manufacturing the same Nov 1, 2017 Issued
Array ( [id] => 16187051 [patent_doc_number] => 10720389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-21 [patent_title] => Anti-fuse structure [patent_app_type] => utility [patent_app_number] => 15/802085 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3798 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802085 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802085
Anti-fuse structure Nov 1, 2017 Issued
Array ( [id] => 15673007 [patent_doc_number] => 10600744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/801999 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 34 [patent_no_of_words] => 22861 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15801999 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/801999
Semiconductor device Nov 1, 2017 Issued
Array ( [id] => 15139477 [patent_doc_number] => 10483224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Semiconductor chip [patent_app_type] => utility [patent_app_number] => 15/791709 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791709 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791709
Semiconductor chip Oct 23, 2017 Issued
Array ( [id] => 12692869 [patent_doc_number] => 20180122789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 15/791831 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10832 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791831 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791831
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE Oct 23, 2017 Abandoned
Array ( [id] => 13832531 [patent_doc_number] => 20190019750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => FUSE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/788812 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15788812 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/788812
FUSE AND FABRICATION METHOD THEREOF Oct 19, 2017 Abandoned
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