Search

Nitin Parekh

Examiner (ID: 329, Phone: (571)272-1663 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1975
Issued Applications
1684
Pending Applications
28
Abandoned Applications
273

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16001027 [patent_doc_number] => 20200176384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/655260 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655260 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655260
Package and method of manufacturing the same Oct 16, 2019 Issued
Array ( [id] => 16000951 [patent_doc_number] => 20200176346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/655264 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655264 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655264
Semiconductor packages and methods of manufacturing the same Oct 16, 2019 Issued
Array ( [id] => 16000973 [patent_doc_number] => 20200176357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/655257 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655257 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655257
Semiconductor device and manufacturing method thereof Oct 16, 2019 Issued
Array ( [id] => 16846009 [patent_doc_number] => 11018105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/601837 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5373 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601837 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601837
Semiconductor device and method of manufacturing the same Oct 14, 2019 Issued
Array ( [id] => 15442929 [patent_doc_number] => 20200035648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => INTEGRATED FAN-OUT PACKAGE AND METHOD OF FABRICATING AN INTEGRATED FAN-OUT PACKAGE [patent_app_type] => utility [patent_app_number] => 16/594089 [patent_app_country] => US [patent_app_date] => 2019-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16594089 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/594089
Integrated fan-out package and method of fabricating an integrated fan-out package Oct 6, 2019 Issued
Array ( [id] => 16752459 [patent_doc_number] => 20210104471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-08 [patent_title] => LEADFRAME WITH GROUND PAD CANTILEVER [patent_app_type] => utility [patent_app_number] => 16/592833 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592833
Leadframe with ground pad cantilever Oct 3, 2019 Issued
Array ( [id] => 15442955 [patent_doc_number] => 20200035661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => Multi-Stack Package-on-Package Structures [patent_app_type] => utility [patent_app_number] => 16/590992 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590992 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/590992
Multi-stack package-on-package structures Oct 1, 2019 Issued
Array ( [id] => 15369567 [patent_doc_number] => 20200020548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => POST-PASSIVATION INTERCONNECT STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/579113 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16579113 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/579113
Post-passivation interconnect structure and method of forming the same Sep 22, 2019 Issued
Array ( [id] => 17158993 [patent_doc_number] => 20210320044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/268277 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17268277 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/268277
Semiconductor device Sep 17, 2019 Issued
Array ( [id] => 15331839 [patent_doc_number] => 20200006249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => EMI Shielding Structure in InFO Package [patent_app_type] => utility [patent_app_number] => 16/569876 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569876
EMI shielding structure in InFO package Sep 12, 2019 Issued
Array ( [id] => 15331967 [patent_doc_number] => 20200006313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => Semiconductor Device Packages, Packaging Methods, and Packaged Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 16/569418 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569418 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569418
Semiconductor device packages, packaging methods, and packaged semiconductor devices Sep 11, 2019 Issued
Array ( [id] => 18317539 [patent_doc_number] => 11631623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Power semiconductor device and method of manufacturing the same, and power conversion device [patent_app_type] => utility [patent_app_number] => 17/267987 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 29 [patent_no_of_words] => 19533 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17267987 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/267987
Power semiconductor device and method of manufacturing the same, and power conversion device Sep 3, 2019 Issued
Array ( [id] => 15889383 [patent_doc_number] => 10651043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Process integration method to tune resistivity of nickel silicide [patent_app_type] => utility [patent_app_number] => 16/544349 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544349
Process integration method to tune resistivity of nickel silicide Aug 18, 2019 Issued
Array ( [id] => 15369791 [patent_doc_number] => 20200020660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => CONDUCTIVE BUMP AND ELECTROLESS Pt PLATING BATH [patent_app_type] => utility [patent_app_number] => 16/503785 [patent_app_country] => US [patent_app_date] => 2019-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503785 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503785
Conductive bump and electroless Pt plating bath Jul 4, 2019 Issued
Array ( [id] => 15351633 [patent_doc_number] => 20200013708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => WIRING SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/449878 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449878 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449878
Wiring substrate Jun 23, 2019 Issued
Array ( [id] => 16987957 [patent_doc_number] => 11075140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Heat conduction structure or semiconductor apparatus [patent_app_type] => utility [patent_app_number] => 16/449999 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7979 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449999
Heat conduction structure or semiconductor apparatus Jun 23, 2019 Issued
Array ( [id] => 16896312 [patent_doc_number] => 11037874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Plane-less voltage reference interconnects [patent_app_type] => utility [patent_app_number] => 16/450287 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 5807 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450287
Plane-less voltage reference interconnects Jun 23, 2019 Issued
Array ( [id] => 16738971 [patent_doc_number] => 10964637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Package and light emitting device [patent_app_type] => utility [patent_app_number] => 16/449446 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 10988 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449446
Package and light emitting device Jun 23, 2019 Issued
Array ( [id] => 15807569 [patent_doc_number] => 20200126927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => SEMICONDUCTOR CHIP INCLUDING ALIGNMENT PATTERN [patent_app_type] => utility [patent_app_number] => 16/430630 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430630 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430630
Semiconductor chip including alignment pattern Jun 3, 2019 Issued
Array ( [id] => 16487729 [patent_doc_number] => 20200381338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/430260 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430260 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430260
SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME Jun 2, 2019 Abandoned
Menu