Search

Nitin Parekh

Examiner (ID: 329, Phone: (571)272-1663 , Office: P/2811 )

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
1975
Issued Applications
1684
Pending Applications
28
Abandoned Applications
273

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19079486 [patent_doc_number] => 11948862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Package structures and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/188707 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 9217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188707 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188707
Package structures and method of forming the same Feb 28, 2021 Issued
Array ( [id] => 18874690 [patent_doc_number] => 11862512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Semiconductor package and method of fabricating semiconductor package [patent_app_type] => utility [patent_app_number] => 17/185978 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 6871 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185978 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185978
Semiconductor package and method of fabricating semiconductor package Feb 25, 2021 Issued
Array ( [id] => 16920544 [patent_doc_number] => 20210193636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/179470 [patent_app_country] => US [patent_app_date] => 2021-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17179470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/179470
Semiconductor package and method of fabricating the same Feb 18, 2021 Issued
Array ( [id] => 18292331 [patent_doc_number] => 11621204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Molded semiconductor module having a mold step for increasing creepage distance [patent_app_type] => utility [patent_app_number] => 17/177703 [patent_app_country] => US [patent_app_date] => 2021-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6351 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177703 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177703
Molded semiconductor module having a mold step for increasing creepage distance Feb 16, 2021 Issued
Array ( [id] => 17941747 [patent_doc_number] => 11476206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor device and method of manufacturing same [patent_app_type] => utility [patent_app_number] => 17/174847 [patent_app_country] => US [patent_app_date] => 2021-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6261 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174847 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174847
Semiconductor device and method of manufacturing same Feb 11, 2021 Issued
Array ( [id] => 18073694 [patent_doc_number] => 11532534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 17/172361 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4846 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172361 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172361
Semiconductor module Feb 9, 2021 Issued
Array ( [id] => 19341423 [patent_doc_number] => 12051618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Methods for forming semiconductor structures and semiconductor structures [patent_app_type] => utility [patent_app_number] => 17/430279 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3231 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17430279 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/430279
Methods for forming semiconductor structures and semiconductor structures Feb 7, 2021 Issued
Array ( [id] => 16850660 [patent_doc_number] => 20210151405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/163746 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12061 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17163746 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/163746
Semiconductor device and a method of manufacturing thereof Jan 31, 2021 Issued
Array ( [id] => 17908668 [patent_doc_number] => 11462531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Multi-stack package-on-package structures [patent_app_type] => utility [patent_app_number] => 17/153292 [patent_app_country] => US [patent_app_date] => 2021-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17153292 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/153292
Multi-stack package-on-package structures Jan 19, 2021 Issued
Array ( [id] => 19016343 [patent_doc_number] => 11923285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Electronic device package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/142198 [patent_app_country] => US [patent_app_date] => 2021-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7137 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142198 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142198
Electronic device package and method of manufacturing the same Jan 4, 2021 Issued
Array ( [id] => 17692259 [patent_doc_number] => 20220199552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/133365 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8110 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133365
Semiconductor device package and method for manufacturing the same Dec 22, 2020 Issued
Array ( [id] => 19670879 [patent_doc_number] => 12183650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Heat extraction path from a laser die using a highly conductive thermal interface material in an optical transceiver [patent_app_type] => utility [patent_app_number] => 17/131642 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5846 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131642
Heat extraction path from a laser die using a highly conductive thermal interface material in an optical transceiver Dec 21, 2020 Issued
Array ( [id] => 17660758 [patent_doc_number] => 20220181223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => COVERS FOR SEMICONDUCTOR PACKAGE COMPONENTS [patent_app_type] => utility [patent_app_number] => 17/116936 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17116936 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/116936
Covers for semiconductor package components Dec 8, 2020 Issued
Array ( [id] => 16723900 [patent_doc_number] => 20210091047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => 3D Package Structure and Methods of Forming Same [patent_app_type] => utility [patent_app_number] => 17/113676 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113676
3D package structure and methods of forming same Dec 6, 2020 Issued
Array ( [id] => 16716215 [patent_doc_number] => 20210083362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => Packaging Structure and Packaging Method for Antenna [patent_app_type] => utility [patent_app_number] => 17/108953 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108953 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108953
Packaging structure and packaging method for antenna Nov 30, 2020 Issued
Array ( [id] => 18175099 [patent_doc_number] => 11574816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Method for manufacturing electronic chips [patent_app_type] => utility [patent_app_number] => 17/104869 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 37 [patent_no_of_words] => 8681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/104869
Method for manufacturing electronic chips Nov 24, 2020 Issued
Array ( [id] => 17847922 [patent_doc_number] => 11437307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction [patent_app_type] => utility [patent_app_number] => 16/949695 [patent_app_country] => US [patent_app_date] => 2020-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 10949 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949695 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/949695
Device comprising first solder interconnects aligned in a first direction and second solder interconnects aligned in a second direction Nov 10, 2020 Issued
Array ( [id] => 18891046 [patent_doc_number] => 11869823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => System in a package modifications [patent_app_type] => utility [patent_app_number] => 17/091371 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4895 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091371
System in a package modifications Nov 5, 2020 Issued
Array ( [id] => 17463764 [patent_doc_number] => 20220077070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => STACKED SEMICONDUCTOR PACKAGE WITH FLYOVER BRIDGE [patent_app_type] => utility [patent_app_number] => 17/090933 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17090933 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/090933
Stacked semiconductor package with flyover bridge Nov 5, 2020 Issued
Array ( [id] => 17559135 [patent_doc_number] => 11315857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Package structures [patent_app_type] => utility [patent_app_number] => 17/081546 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081546 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/081546
Package structures Oct 26, 2020 Issued
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