Application number | Title of the application | Filing Date | Status |
---|
07/841522 | DYNAMIC RANDOM ACCESS MEMORY DEVICE | Feb 25, 1992 | Abandoned |
07/839012 | LASER LINK DECODER FOR DRAM REDUNDANCY SCHEME | Feb 16, 1992 | Abandoned |
07/837254 | MEMORY CELL ARRAY AND MEMORY CIRCUIT | Feb 13, 1992 | Abandoned |
Array
(
[id] => 2815468
[patent_doc_number] => 05148391
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-15
[patent_title] => 'Nonvolatile, zero-power memory cell constructed with capacitor-like antifuses operable at less than power supply voltage'
[patent_app_type] => 1
[patent_app_number] => 7/837175
[patent_app_country] => US
[patent_app_date] => 1992-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3793
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/148/05148391.pdf
[firstpage_image] =>[orig_patent_app_number] => 837175
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/837175 | Nonvolatile, zero-power memory cell constructed with capacitor-like antifuses operable at less than power supply voltage | Feb 13, 1992 | Issued |
Array
(
[id] => 3109724
[patent_doc_number] => 05293561
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-08
[patent_title] => 'Write-in voltage source incorporated in electrically erasable programmable read only memory device with redundant memory cell array'
[patent_app_type] => 1
[patent_app_number] => 7/835335
[patent_app_country] => US
[patent_app_date] => 1992-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5691
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/293/05293561.pdf
[firstpage_image] =>[orig_patent_app_number] => 835335
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/835335 | Write-in voltage source incorporated in electrically erasable programmable read only memory device with redundant memory cell array | Feb 13, 1992 | Issued |
07/827715 | TRANSISTOR STRUCTURE FOR USE IN ERASABLE AND PROGRAMMABLE SEMICONDUCTOR MEMORY DEVICES | Jan 28, 1992 | Abandoned |
Array
(
[id] => 3107320
[patent_doc_number] => 05299152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-29
[patent_title] => 'Anti-fuse memory device with switched capacitor setting method'
[patent_app_type] => 1
[patent_app_number] => 7/827073
[patent_app_country] => US
[patent_app_date] => 1992-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1651
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/299/05299152.pdf
[firstpage_image] =>[orig_patent_app_number] => 827073
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/827073 | Anti-fuse memory device with switched capacitor setting method | Jan 27, 1992 | Issued |
Array
(
[id] => 2922555
[patent_doc_number] => 05237528
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-17
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/822325
[patent_app_country] => US
[patent_app_date] => 1992-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 58
[patent_figures_cnt] => 104
[patent_no_of_words] => 25608
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/237/05237528.pdf
[firstpage_image] =>[orig_patent_app_number] => 822325
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/822325 | Semiconductor memory | Jan 16, 1992 | Issued |
07/821574 | SEMICONDUCTOR MEMORY DEVICE | Jan 15, 1992 | Abandoned |
07/820084 | SEMICONDUCTOR DEVICE | Jan 12, 1992 | Abandoned |
Array
(
[id] => 2969808
[patent_doc_number] => 05198997
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-30
[patent_title] => 'Ultraviolet erasable nonvolatile memory with current mirror circuit type sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 7/818113
[patent_app_country] => US
[patent_app_date] => 1992-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5048
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/198/05198997.pdf
[firstpage_image] =>[orig_patent_app_number] => 818113
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/818113 | Ultraviolet erasable nonvolatile memory with current mirror circuit type sense amplifier | Jan 7, 1992 | Issued |
Array
(
[id] => 3120467
[patent_doc_number] => 05465230
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-07
[patent_title] => 'Read/write/restore circuit for memory arrays'
[patent_app_type] => 1
[patent_app_number] => 7/808047
[patent_app_country] => US
[patent_app_date] => 1991-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3445
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/465/05465230.pdf
[firstpage_image] =>[orig_patent_app_number] => 808047
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/808047 | Read/write/restore circuit for memory arrays | Dec 11, 1991 | Issued |
Array
(
[id] => 2851036
[patent_doc_number] => 05172337
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-15
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/778064
[patent_app_country] => US
[patent_app_date] => 1991-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 3711
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/172/05172337.pdf
[firstpage_image] =>[orig_patent_app_number] => 778064
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/778064 | Semiconductor memory device | Dec 5, 1991 | Issued |
07/798095 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE | Nov 26, 1991 | Abandoned |
Array
(
[id] => 2949571
[patent_doc_number] => 05191551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-02
[patent_title] => 'Non-volatile semiconductor memory device with transistor paralleling floating gate transistor'
[patent_app_type] => 1
[patent_app_number] => 7/799165
[patent_app_country] => US
[patent_app_date] => 1991-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 8828
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/191/05191551.pdf
[firstpage_image] =>[orig_patent_app_number] => 799165
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/799165 | Non-volatile semiconductor memory device with transistor paralleling floating gate transistor | Nov 26, 1991 | Issued |
Array
(
[id] => 2948219
[patent_doc_number] => 05260904
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Data bus clamp circuit for a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/797954
[patent_app_country] => US
[patent_app_date] => 1991-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5037
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/260/05260904.pdf
[firstpage_image] =>[orig_patent_app_number] => 797954
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/797954 | Data bus clamp circuit for a semiconductor memory device | Nov 25, 1991 | Issued |
Array
(
[id] => 3020367
[patent_doc_number] => 05276643
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-04
[patent_title] => 'Integrated semiconductor circuit'
[patent_app_type] => 1
[patent_app_number] => 7/799907
[patent_app_country] => US
[patent_app_date] => 1991-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 8722
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/276/05276643.pdf
[firstpage_image] =>[orig_patent_app_number] => 799907
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/799907 | Integrated semiconductor circuit | Nov 25, 1991 | Issued |
Array
(
[id] => 2887816
[patent_doc_number] => 05159574
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-27
[patent_title] => 'Address transition detection circuit'
[patent_app_type] => 1
[patent_app_number] => 7/798634
[patent_app_country] => US
[patent_app_date] => 1991-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 1271
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/159/05159574.pdf
[firstpage_image] =>[orig_patent_app_number] => 798634
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/798634 | Address transition detection circuit | Nov 25, 1991 | Issued |
Array
(
[id] => 3060506
[patent_doc_number] => 05283758
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-01
[patent_title] => 'Non-volatile semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/794708
[patent_app_country] => US
[patent_app_date] => 1991-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6707
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/283/05283758.pdf
[firstpage_image] =>[orig_patent_app_number] => 794708
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/794708 | Non-volatile semiconductor memory device | Nov 19, 1991 | Issued |
Array
(
[id] => 2955926
[patent_doc_number] => 05255238
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-19
[patent_title] => 'First-in first-out semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/794824
[patent_app_country] => US
[patent_app_date] => 1991-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 25
[patent_no_of_words] => 20937
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/255/05255238.pdf
[firstpage_image] =>[orig_patent_app_number] => 794824
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/794824 | First-in first-out semiconductor memory device | Nov 17, 1991 | Issued |