Application number | Title of the application | Filing Date | Status |
---|
Array
(
[id] => 3635049
[patent_doc_number] => 05608670
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-04
[patent_title] => 'Flash memory with improved erasability and its circuitry'
[patent_app_type] => 1
[patent_app_number] => 8/436721
[patent_app_country] => US
[patent_app_date] => 1995-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 99
[patent_figures_cnt] => 138
[patent_no_of_words] => 43738
[patent_no_of_claims] => 8
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
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[pdf_file] => patents/05/608/05608670.pdf
[firstpage_image] =>[orig_patent_app_number] => 436721
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/436721 | Flash memory with improved erasability and its circuitry | May 7, 1995 | Issued |
08/420911 | SEMICONDUCTOR MEMORY CELL AND PROCESS FOR FORMATION THEREOF | Apr 11, 1995 | Abandoned |
Array
(
[id] => 3560708
[patent_doc_number] => 05572464
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-05
[patent_title] => 'Semiconductor memory device and method of using the same'
[patent_app_type] => 1
[patent_app_number] => 8/415767
[patent_app_country] => US
[patent_app_date] => 1995-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 4644
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/572/05572464.pdf
[firstpage_image] =>[orig_patent_app_number] => 415767
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/415767 | Semiconductor memory device and method of using the same | Apr 2, 1995 | Issued |
Array
(
[id] => 3437115
[patent_doc_number] => 05455794
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Method and apparatus for controlling the output current provided by a charge pump circuit'
[patent_app_type] => 1
[patent_app_number] => 8/403633
[patent_app_country] => US
[patent_app_date] => 1995-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5748
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
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[pdf_file] => patents/05/455/05455794.pdf
[firstpage_image] =>[orig_patent_app_number] => 403633
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/403633 | Method and apparatus for controlling the output current provided by a charge pump circuit | Mar 13, 1995 | Issued |
Array
(
[id] => 3672438
[patent_doc_number] => 05625593
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-29
[patent_title] => 'Memory card circuit with separate buffer chips'
[patent_app_type] => 1
[patent_app_number] => 8/392290
[patent_app_country] => US
[patent_app_date] => 1995-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6437
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/625/05625593.pdf
[firstpage_image] =>[orig_patent_app_number] => 392290
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/392290 | Memory card circuit with separate buffer chips | Feb 21, 1995 | Issued |
Array
(
[id] => 3727567
[patent_doc_number] => 05617356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-01
[patent_title] => 'Regulation circuit and method for the erasing phase of non-volatile memory cells'
[patent_app_type] => 1
[patent_app_number] => 8/395361
[patent_app_country] => US
[patent_app_date] => 1995-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2874
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/617/05617356.pdf
[firstpage_image] =>[orig_patent_app_number] => 395361
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/395361 | Regulation circuit and method for the erasing phase of non-volatile memory cells | Feb 20, 1995 | Issued |
08/387017 | FAST-SENSING AMPLIFIER FOR FLASH MEMORY | Feb 9, 1995 | Abandoned |
Array
(
[id] => 3534571
[patent_doc_number] => 05504703
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Single event upset hardened CMOS latch circuit'
[patent_app_type] => 1
[patent_app_number] => 8/382112
[patent_app_country] => US
[patent_app_date] => 1995-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2084
[patent_no_of_claims] => 6
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/504/05504703.pdf
[firstpage_image] =>[orig_patent_app_number] => 382112
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/382112 | Single event upset hardened CMOS latch circuit | Jan 31, 1995 | Issued |
08/379102 | ARRAY CELL CIRCUIT WITH SPLIT READ/WRITE LINE | Jan 26, 1995 | Abandoned |
Array
(
[id] => 3602737
[patent_doc_number] => 05521859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'Semiconductor memory device having thin film transistor and method of producing the same'
[patent_app_type] => 1
[patent_app_number] => 8/373502
[patent_app_country] => US
[patent_app_date] => 1995-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 153
[patent_figures_cnt] => 153
[patent_no_of_words] => 30170
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/521/05521859.pdf
[firstpage_image] =>[orig_patent_app_number] => 373502
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/373502 | Semiconductor memory device having thin film transistor and method of producing the same | Jan 16, 1995 | Issued |
08/364235 | SEMICONDUCTOR MEMORY DEVICE | Dec 26, 1994 | Abandoned |
Array
(
[id] => 3471879
[patent_doc_number] => 05469392
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-21
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/363978
[patent_app_country] => US
[patent_app_date] => 1994-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4078
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/469/05469392.pdf
[firstpage_image] =>[orig_patent_app_number] => 363978
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/363978 | Semiconductor memory | Dec 22, 1994 | Issued |
08/361848 | HIGH DENSITY CONTACTLESS FLASH EPROM ARRAY USING CHANNEL ERASE | Dec 20, 1994 | Abandoned |
Array
(
[id] => 3523343
[patent_doc_number] => 05513136
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'Nonvolatile memory with blocks and circuitry for selectively protecting the blocks for memory operations'
[patent_app_type] => 1
[patent_app_number] => 8/358978
[patent_app_country] => US
[patent_app_date] => 1994-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5600
[patent_no_of_claims] => 6
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/513/05513136.pdf
[firstpage_image] =>[orig_patent_app_number] => 358978
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358978 | Nonvolatile memory with blocks and circuitry for selectively protecting the blocks for memory operations | Dec 18, 1994 | Issued |
Array
(
[id] => 3559383
[patent_doc_number] => 05548548
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Pass transistor for a 256 megabit dram with negatively biased substrate'
[patent_app_type] => 1
[patent_app_number] => 8/358647
[patent_app_country] => US
[patent_app_date] => 1994-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 17
[patent_no_of_words] => 3777
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/548/05548548.pdf
[firstpage_image] =>[orig_patent_app_number] => 358647
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358647 | Pass transistor for a 256 megabit dram with negatively biased substrate | Dec 18, 1994 | Issued |
08/350516 | CONTENT ADDRESSABLE MEMORY | Dec 5, 1994 | Abandoned |
08/353276 | SEMICONDUCTOR MEMORY DEVICE INCLUDING AN SOI SUBSTRATE | Dec 4, 1994 | Abandoned |
08/349745 | NONVOLATILE FLOATING GATE MEMORY WITH IMPROVED INTERPOLY DIELECTRIC | Dec 4, 1994 | Abandoned |
08/345985 | A METHOD OF ERASING A HIGH DENSISTY CONTACTLESS FLASH EPROM ARRAY | Nov 27, 1994 | Abandoned |
Array
(
[id] => 3741905
[patent_doc_number] => 05694356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'High resolution analog storage EPROM and flash EPROM'
[patent_app_type] => 1
[patent_app_number] => 8/333381
[patent_app_country] => US
[patent_app_date] => 1994-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 63
[patent_figures_cnt] => 63
[patent_no_of_words] => 16631
[patent_no_of_claims] => 42
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/694/05694356.pdf
[firstpage_image] =>[orig_patent_app_number] => 333381
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/333381 | High resolution analog storage EPROM and flash EPROM | Nov 1, 1994 | Issued |