Search

Norman Drew Richards

Examiner (ID: 285)

Most Active Art Unit
2815
Art Unit(s)
2895, 2816, 2815, 2892
Total Applications
484
Issued Applications
353
Pending Applications
30
Abandoned Applications
105

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19559996 [patent_doc_number] => 20240371788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => ELECTRONIC ASSEMBLY, ELECTRONIC APPARATUS INCLUDING THE SAME AND METHOD FOR FABRICATING ELECTRONIC ASSEMBLY [patent_app_type] => utility [patent_app_number] => 18/777911 [patent_app_country] => US [patent_app_date] => 2024-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/777911
ELECTRONIC ASSEMBLY, ELECTRONIC APPARATUS INCLUDING THE SAME AND METHOD FOR FABRICATING ELECTRONIC ASSEMBLY Jul 18, 2024 Abandoned
Array ( [id] => 19560219 [patent_doc_number] => 20240372011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/771543 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771543 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/771543
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE Jul 11, 2024 Pending
Array ( [id] => 20177587 [patent_doc_number] => 12396353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Display device including connection wiring part laterally adjacent to driving voltage wiring [patent_app_type] => utility [patent_app_number] => 18/750067 [patent_app_country] => US [patent_app_date] => 2024-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9336 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750067 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/750067
Display device including connection wiring part laterally adjacent to driving voltage wiring Jun 20, 2024 Issued
Array ( [id] => 19452796 [patent_doc_number] => 20240312926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SOLDERABLE AND WIRE BONDABLE PART MARKING [patent_app_type] => utility [patent_app_number] => 18/672877 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672877 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672877
SOLDERABLE AND WIRE BONDABLE PART MARKING May 22, 2024 Pending
Array ( [id] => 19386943 [patent_doc_number] => 20240276813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => DISPLAY SUBSTRATE, PREPARATION METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/645403 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645403 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/645403
Display substrate including connection line and power line surrounding display area, preparation method thereof, and display device Apr 24, 2024 Issued
Array ( [id] => 19285930 [patent_doc_number] => 20240222407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => STACKED STRUCTURE FOR CMOS IMAGE SENSORS [patent_app_type] => utility [patent_app_number] => 18/442357 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442357
Stacked structure for CMOS image sensors Feb 14, 2024 Issued
Array ( [id] => 20418482 [patent_doc_number] => 12501788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Display panel including active pattern overlapping shielding pattern, and display device including the same [patent_app_type] => utility [patent_app_number] => 18/510797 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 4645 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510797
Display panel including active pattern overlapping shielding pattern, and display device including the same Nov 15, 2023 Issued
Array ( [id] => 18943467 [patent_doc_number] => 20240038606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/378465 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18378465 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/378465
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES Oct 9, 2023 Issued
Array ( [id] => 19101035 [patent_doc_number] => 20240120263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/367896 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367896 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367896
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE Sep 12, 2023 Pending
Array ( [id] => 19835759 [patent_doc_number] => 20250087545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => Semiconductor Device and Method of Forming FOWLP with Pre-Molded Embedded Discrete Electrical Component [patent_app_type] => utility [patent_app_number] => 18/462612 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462612 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462612
Semiconductor Device and Method of Forming FOWLP with Pre-Molded Embedded Discrete Electrical Component Sep 6, 2023 Pending
Array ( [id] => 20705934 [patent_doc_number] => 12628666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Semiconductor device with metal connector having notch [patent_app_type] => utility [patent_app_number] => 18/351542 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2215 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/351542
Semiconductor device with metal connector having notch Jul 12, 2023 Issued
Array ( [id] => 20692110 [patent_doc_number] => 12622286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Side-wettable semiconductor package device with heat dissipation surface structure [patent_app_type] => utility [patent_app_number] => 18/345476 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 0 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/345476
Side-wettable semiconductor package device with heat dissipation surface structure Jun 29, 2023 Issued
Array ( [id] => 20720244 [patent_doc_number] => 12635516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Semiconductor device with enhanced bonding, method of manufacturing same, and power conversion device [patent_app_type] => utility [patent_app_number] => 18/331385 [patent_app_country] => US [patent_app_date] => 2023-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 9202 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18331385 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/331385
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE Jun 7, 2023 Issued
Array ( [id] => 19619245 [patent_doc_number] => 20240404925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => MOLDED POWER SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/205129 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7331 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205129 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205129
MOLDED POWER SEMICONDUCTOR PACKAGE Jun 1, 2023 Pending
Array ( [id] => 18757546 [patent_doc_number] => 20230361009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR PACKAGE HAVING AN EMBEDDED ELECTRICAL CONDUCTOR CONNECTED BETWEEN PINS OF A SEMICONDUCTOR DIE AND A FURTHER DEVICE [patent_app_type] => utility [patent_app_number] => 18/195178 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195178 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195178
SEMICONDUCTOR PACKAGE HAVING AN EMBEDDED ELECTRICAL CONDUCTOR CONNECTED BETWEEN PINS OF A SEMICONDUCTOR DIE AND A FURTHER DEVICE May 8, 2023 Pending
Array ( [id] => 19559967 [patent_doc_number] => 20240371759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => Semiconductor Device and Method of Making a Multi-Tier System-in-Package [patent_app_type] => utility [patent_app_number] => 18/312133 [patent_app_country] => US [patent_app_date] => 2023-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312133 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312133
Semiconductor Device and Method of Making a Multi-Tier System-in-Package May 3, 2023 Pending
Array ( [id] => 19436031 [patent_doc_number] => 20240304529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => DISCRETE DUAL PADS FOR A CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/181950 [patent_app_country] => US [patent_app_date] => 2023-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18181950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/181950
DISCRETE DUAL PADS FOR A CIRCUIT Mar 9, 2023 Issued
Array ( [id] => 20361711 [patent_doc_number] => 12477729 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => CMOS device, method of manufacturing CMOS device, and semiconductor memory device including CMOS device [patent_app_type] => utility [patent_app_number] => 18/113543 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 1152 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18113543 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/113543
CMOS device, method of manufacturing CMOS device, and semiconductor memory device including CMOS device Feb 22, 2023 Issued
Array ( [id] => 19364337 [patent_doc_number] => 20240266371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => INTEGRATED CIRCUIT WITH AND METHOD FOR CONNECTION OF A PLURALITY OF FLOATING DIFFUSION REGIONS [patent_app_type] => utility [patent_app_number] => 18/164014 [patent_app_country] => US [patent_app_date] => 2023-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164014 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/164014
INTEGRATED CIRCUIT WITH AND METHOD FOR CONNECTION OF A PLURALITY OF FLOATING DIFFUSION REGIONS Feb 2, 2023 Pending
Array ( [id] => 18490326 [patent_doc_number] => 20230217680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => LIGHT EMITTING DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/980044 [patent_app_country] => US [patent_app_date] => 2022-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17980044 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/980044
Light emitting display apparatus including an undercut along an outer periphery of an anode Nov 2, 2022 Issued
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