Search

Norman Drew Richards

Supervisory Patent Examiner (ID: 16768, Phone: (571)272-1736 , Office: P/2800 )

Most Active Art Unit
2815
Art Unit(s)
2816, 2815, 2892, 2895
Total Applications
465
Issued Applications
346
Pending Applications
22
Abandoned Applications
101

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18965838 [patent_doc_number] => 11899603 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Connection hub with integrated switch for private and non-private modes [patent_app_type] => utility [patent_app_number] => 18/338201 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 9528 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338201
Connection hub with integrated switch for private and non-private modes Jun 19, 2023 Issued
Array ( [id] => 19045203 [patent_doc_number] => 11934313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Scalable system on a chip [patent_app_type] => utility [patent_app_number] => 17/821296 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 72 [patent_figures_cnt] => 86 [patent_no_of_words] => 87678 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821296
Scalable system on a chip Aug 21, 2022 Issued
Array ( [id] => 18981971 [patent_doc_number] => 11907144 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-20 [patent_title] => Early semaphore update [patent_app_type] => utility [patent_app_number] => 17/805410 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12528 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17805410 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/805410
Early semaphore update Jun 2, 2022 Issued
Array ( [id] => 18703375 [patent_doc_number] => 11789886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Controller area network device [patent_app_type] => utility [patent_app_number] => 17/657069 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 11043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657069
Controller area network device Mar 28, 2022 Issued
Array ( [id] => 18569139 [patent_doc_number] => 20230259475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SYSTEM ON CHIP [patent_app_type] => utility [patent_app_number] => 17/705403 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3500 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705403
SYSTEM ON CHIP Mar 27, 2022 Abandoned
Array ( [id] => 18659976 [patent_doc_number] => 20230305983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Interface between Processing Unit and an External Nonvolatile Memory [patent_app_type] => utility [patent_app_number] => 17/700907 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700907 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/700907
Interface between processing unit and an external nonvolatile memory Mar 21, 2022 Issued
Array ( [id] => 18872995 [patent_doc_number] => 11860802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Instant recovery as an enabler for uninhibited mobility between primary storage and secondary storage [patent_app_type] => utility [patent_app_number] => 17/676013 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6823 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676013
Instant recovery as an enabler for uninhibited mobility between primary storage and secondary storage Feb 17, 2022 Issued
Array ( [id] => 17643982 [patent_doc_number] => 20220171720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => MAPPED REGISTER ACCESS BY MICROCONTROLLERS [patent_app_type] => utility [patent_app_number] => 17/673399 [patent_app_country] => US [patent_app_date] => 2022-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17673399 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/673399
MAPPED REGISTER ACCESS BY MICROCONTROLLERS Feb 15, 2022 Abandoned
Array ( [id] => 18407677 [patent_doc_number] => 20230169030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => APPARATUS FOR READ/WRITE OPERATIONS ON SAS HARD DISK THROUGH USB INTERFACE [patent_app_type] => utility [patent_app_number] => 17/553792 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2005 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17553792 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/553792
APPARATUS FOR READ/WRITE OPERATIONS ON SAS HARD DISK THROUGH USB INTERFACE Dec 15, 2021 Abandoned
Array ( [id] => 18430324 [patent_doc_number] => 11675542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Dedicated design for testability paths for memory sub-system controller [patent_app_type] => utility [patent_app_number] => 17/545787 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7199 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545787 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545787
Dedicated design for testability paths for memory sub-system controller Dec 7, 2021 Issued
Array ( [id] => 17659345 [patent_doc_number] => 20220179810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => METHOD FOR MANAGING THE OPERATION OF A SYSTEM ON CHIP, FOR EXAMPLE A MICROCONTROLLER, AND CORRESPONDING SYSTEM ON CHIP [patent_app_type] => utility [patent_app_number] => 17/539797 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17539797 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/539797
METHOD FOR MANAGING THE OPERATION OF A SYSTEM ON CHIP, FOR EXAMPLE A MICROCONTROLLER, AND CORRESPONDING SYSTEM ON CHIP Nov 30, 2021 Abandoned
Array ( [id] => 17962254 [patent_doc_number] => 20220342835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => METHOD AND APPARATUS FOR DISAGGREGATION OF COMPUTING RESOURCES [patent_app_type] => utility [patent_app_number] => 17/535761 [patent_app_country] => US [patent_app_date] => 2021-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535761 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/535761
METHOD AND APPARATUS FOR DISAGGREGATION OF COMPUTING RESOURCES Nov 25, 2021 Abandoned
Array ( [id] => 18493457 [patent_doc_number] => 11698875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => IC, monitoring system and monitoring method thereof [patent_app_type] => utility [patent_app_number] => 17/510906 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17510906 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/510906
IC, monitoring system and monitoring method thereof Oct 25, 2021 Issued
Array ( [id] => 18291375 [patent_doc_number] => 11620245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Multi-socket network interface controller with consistent transaction ordering [patent_app_type] => utility [patent_app_number] => 17/503392 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/503392
Multi-socket network interface controller with consistent transaction ordering Oct 17, 2021 Issued
Array ( [id] => 18855655 [patent_doc_number] => 11853233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Sequentially and bidirectionally connecting peripherals and devices to an information handling system [patent_app_type] => utility [patent_app_number] => 17/495882 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5737 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495882
Sequentially and bidirectionally connecting peripherals and devices to an information handling system Oct 6, 2021 Issued
Array ( [id] => 18262169 [patent_doc_number] => 11609871 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-21 [patent_title] => Integrated circuit device with crossbar to route traffic [patent_app_type] => utility [patent_app_number] => 17/496572 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5993 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496572
Integrated circuit device with crossbar to route traffic Oct 6, 2021 Issued
Array ( [id] => 17345863 [patent_doc_number] => 20220012194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => APPARATUS AND METHOD FOR DATA TRANSMISSION AND READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/485191 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/485191
Apparatus and method for data transmission and readable storage medium Sep 23, 2021 Issued
Array ( [id] => 17831991 [patent_doc_number] => 20220269295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => POWER SOURCE CIRCUIT, INPUT AND OUTPUT CIRCUIT, SEMICONDUCTOR STORAGE DEVICE, AND POWER SUPPLY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/461852 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461852
Power source circuit, input and output circuit, semiconductor storage device, and power supply control method Aug 29, 2021 Issued
Array ( [id] => 18218351 [patent_doc_number] => 11593290 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-28 [patent_title] => Using a hardware sequencer in a direct memory access system of a system on a chip [patent_app_type] => utility [patent_app_number] => 17/391867 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 61 [patent_no_of_words] => 58278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391867
Using a hardware sequencer in a direct memory access system of a system on a chip Aug 1, 2021 Issued
Array ( [id] => 17372242 [patent_doc_number] => 20220027294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => STORAGE CARD AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/382863 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17382863 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/382863
STORAGE CARD AND STORAGE DEVICE Jul 21, 2021 Abandoned
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