
Norman Drew Richards
Examiner (ID: 285)
| Most Active Art Unit | 2815 |
| Art Unit(s) | 2895, 2816, 2815, 2892 |
| Total Applications | 484 |
| Issued Applications | 353 |
| Pending Applications | 30 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 493459
[patent_doc_number] => 07211471
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-05-01
[patent_title] => 'Exposed lead QFP package fabricated through the use of a partial saw process'
[patent_app_type] => utility
[patent_app_number] => 10/881846
[patent_app_country] => US
[patent_app_date] => 2004-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 7753
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/211/07211471.pdf
[firstpage_image] =>[orig_patent_app_number] => 10881846
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/881846 | Exposed lead QFP package fabricated through the use of a partial saw process | Jun 29, 2004 | Issued |
Array
(
[id] => 7154841
[patent_doc_number] => 20050026433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Integrated circuit device and fabrication using metal-doped chalcogenide materials'
[patent_app_type] => utility
[patent_app_number] => 10/872773
[patent_app_country] => US
[patent_app_date] => 2004-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5949
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20050026433.pdf
[firstpage_image] =>[orig_patent_app_number] => 10872773
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/872773 | Integrated circuit device and fabrication using metal-doped chalcogenide materials | Jun 21, 2004 | Abandoned |
Array
(
[id] => 687775
[patent_doc_number] => 07078769
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-18
[patent_title] => 'Nonvolatile memory and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/866766
[patent_app_country] => US
[patent_app_date] => 2004-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 57
[patent_no_of_words] => 12738
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/078/07078769.pdf
[firstpage_image] =>[orig_patent_app_number] => 10866766
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/866766 | Nonvolatile memory and manufacturing method thereof | Jun 14, 2004 | Issued |
Array
(
[id] => 7314329
[patent_doc_number] => 20040222504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-11
[patent_title] => 'Wafer level packaging'
[patent_app_type] => new
[patent_app_number] => 10/866448
[patent_app_country] => US
[patent_app_date] => 2004-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2693
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 3
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0222/20040222504.pdf
[firstpage_image] =>[orig_patent_app_number] => 10866448
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/866448 | Wafer level packaging | Jun 10, 2004 | Issued |
Array
(
[id] => 7058904
[patent_doc_number] => 20050001263
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-06
[patent_title] => 'Field-effect transistor, semiconductor device including field-effect transistor, and method for manufacturing field-effect transistor and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/853121
[patent_app_country] => US
[patent_app_date] => 2004-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2571
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20050001263.pdf
[firstpage_image] =>[orig_patent_app_number] => 10853121
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/853121 | Field-effect transistor, semiconductor device including field-effect transistor, and method for manufacturing field-effect transistor and semiconductor device | May 25, 2004 | Issued |
Array
(
[id] => 7429123
[patent_doc_number] => 20040209426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-21
[patent_title] => 'Method and composite for decreasing charge leakage'
[patent_app_type] => new
[patent_app_number] => 10/842229
[patent_app_country] => US
[patent_app_date] => 2004-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3727
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0209/20040209426.pdf
[firstpage_image] =>[orig_patent_app_number] => 10842229
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/842229 | Method and composite for decreasing charge leakage | May 9, 2004 | Issued |
Array
(
[id] => 7407561
[patent_doc_number] => 20040227243
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-18
[patent_title] => 'Methods of pore sealing and metal encapsulation in porous low k interconnect'
[patent_app_type] => new
[patent_app_number] => 10/824754
[patent_app_country] => US
[patent_app_date] => 2004-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4550
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 30
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20040227243.pdf
[firstpage_image] =>[orig_patent_app_number] => 10824754
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/824754 | Methods of pore sealing and metal encapsulation in porous low k interconnect | Apr 14, 2004 | Abandoned |
Array
(
[id] => 687773
[patent_doc_number] => 07078768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-18
[patent_title] => 'Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof'
[patent_app_type] => utility
[patent_app_number] => 10/815701
[patent_app_country] => US
[patent_app_date] => 2004-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 37
[patent_no_of_words] => 9269
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/078/07078768.pdf
[firstpage_image] =>[orig_patent_app_number] => 10815701
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/815701 | Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof | Apr 1, 2004 | Issued |
Array
(
[id] => 7420518
[patent_doc_number] => 20040183065
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Self-aligned junction passivation for superconductor integrated circuit'
[patent_app_type] => new
[patent_app_number] => 10/814512
[patent_app_country] => US
[patent_app_date] => 2004-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4153
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0183/20040183065.pdf
[firstpage_image] =>[orig_patent_app_number] => 10814512
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/814512 | Self-aligned junction passivation for superconductor integrated circuit | Mar 31, 2004 | Issued |
Array
(
[id] => 7393674
[patent_doc_number] => 20040173870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'Manufacturing method of semiconductor device with filling insulating film into trench'
[patent_app_type] => new
[patent_app_number] => 10/799881
[patent_app_country] => US
[patent_app_date] => 2004-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 43
[patent_no_of_words] => 13048
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20040173870.pdf
[firstpage_image] =>[orig_patent_app_number] => 10799881
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/799881 | Manufacturing method of semiconductor device with filling insulating film into trench | Mar 14, 2004 | Abandoned |
Array
(
[id] => 6936452
[patent_doc_number] => 20050110013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'High aperture LCD with insulating color filters overlapping bus lines on active substrate'
[patent_app_type] => utility
[patent_app_number] => 10/800037
[patent_app_country] => US
[patent_app_date] => 2004-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9098
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20050110013.pdf
[firstpage_image] =>[orig_patent_app_number] => 10800037
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/800037 | High aperture LCD with insulating color filters overlapping bus lines on active substrate | Mar 14, 2004 | Issued |
Array
(
[id] => 7174418
[patent_doc_number] => 20040201109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-14
[patent_title] => 'Semiconductor devices, manufacturing methods therefore, circuit substrates and electronic devices'
[patent_app_type] => new
[patent_app_number] => 10/795411
[patent_app_country] => US
[patent_app_date] => 2004-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0201/20040201109.pdf
[firstpage_image] =>[orig_patent_app_number] => 10795411
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/795411 | Semiconductor devices, manufacturing methods therefore, circuit substrates and electronic devices | Mar 8, 2004 | Abandoned |
Array
(
[id] => 7338506
[patent_doc_number] => 20040245583
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-09
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/790765
[patent_app_country] => US
[patent_app_date] => 2004-03-03
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[pdf_file] => publications/A1/0245/20040245583.pdf
[firstpage_image] =>[orig_patent_app_number] => 10790765
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/790765 | Semiconductor device and manufacturing method thereof | Mar 2, 2004 | Abandoned |
Array
(
[id] => 465259
[patent_doc_number] => 07238995
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-03
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/789352
[patent_app_country] => US
[patent_app_date] => 2004-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
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[patent_no_of_words] => 8723
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[pdf_file] => patents/07/238/07238995.pdf
[firstpage_image] =>[orig_patent_app_number] => 10789352
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/789352 | Semiconductor device and method of manufacturing the same | Feb 25, 2004 | Issued |
Array
(
[id] => 7048452
[patent_doc_number] => 20050184339
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Semiconductor devices having thermal spacers'
[patent_app_type] => utility
[patent_app_number] => 10/786962
[patent_app_country] => US
[patent_app_date] => 2004-02-25
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[pdf_file] => publications/A1/0184/20050184339.pdf
[firstpage_image] =>[orig_patent_app_number] => 10786962
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/786962 | Semiconductor devices having thermal spacers | Feb 24, 2004 | Issued |
Array
(
[id] => 1037859
[patent_doc_number] => 06873011
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-03-29
[patent_title] => 'High voltage and low on-resistance LDMOS transistor having equalized capacitance'
[patent_app_type] => utility
[patent_app_number] => 10/786701
[patent_app_country] => US
[patent_app_date] => 2004-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/873/06873011.pdf
[firstpage_image] =>[orig_patent_app_number] => 10786701
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/786701 | High voltage and low on-resistance LDMOS transistor having equalized capacitance | Feb 23, 2004 | Issued |
Array
(
[id] => 7008365
[patent_doc_number] => 20050062081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/781811
[patent_app_country] => US
[patent_app_date] => 2004-02-20
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[pdf_file] => publications/A1/0062/20050062081.pdf
[firstpage_image] =>[orig_patent_app_number] => 10781811
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/781811 | Semiconductor device and method for fabricating the same | Feb 19, 2004 | Issued |
Array
(
[id] => 7414924
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[patent_country] => US
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[patent_title] => 'Semiconductor with a nitrided silicon gate oxide and method'
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[firstpage_image] =>[orig_patent_app_number] => 10783081
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/783081 | Semiconductor with a nitrided silicon gate oxide and method | Feb 18, 2004 | Issued |
Array
(
[id] => 1028377
[patent_doc_number] => 06882008
[patent_country] => US
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[patent_issue_date] => 2005-04-19
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 10/779621
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/882/06882008.pdf
[firstpage_image] =>[orig_patent_app_number] => 10779621
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/779621 | Semiconductor integrated circuit device | Feb 17, 2004 | Issued |
Array
(
[id] => 7125111
[patent_doc_number] => 20050056855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Light-emitting device with enlarged active light-emitting region'
[patent_app_type] => utility
[patent_app_number] => 10/777062
[patent_app_country] => US
[patent_app_date] => 2004-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5421
[patent_no_of_claims] => 41
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20050056855.pdf
[firstpage_image] =>[orig_patent_app_number] => 10777062
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/777062 | Light-emitting device with enlarged active light-emitting region | Feb 12, 2004 | Abandoned |