Search

Norman Drew Richards

Supervisory Patent Examiner (ID: 164, Phone: (571)272-1736 , Office: P/2800 )

Most Active Art Unit
2815
Art Unit(s)
2892, 2815, 2895, 2816
Total Applications
491
Issued Applications
359
Pending Applications
28
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6949742 [patent_doc_number] => 20050224836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'SILICON CONTROLLED RECTIFIER' [patent_app_type] => utility [patent_app_number] => 10/711542 [patent_app_country] => US [patent_app_date] => 2004-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3537 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224836.pdf [firstpage_image] =>[orig_patent_app_number] => 10711542 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/711542
Silicon controlled rectifier Sep 23, 2004 Issued
Array ( [id] => 6971878 [patent_doc_number] => 20050037588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Method for manufacturing and structure of semiconductor device with sinker contact region' [patent_app_type] => utility [patent_app_number] => 10/939221 [patent_app_country] => US [patent_app_date] => 2004-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3274 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20050037588.pdf [firstpage_image] =>[orig_patent_app_number] => 10939221 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/939221
Structure of semiconductor device with sinker contact region Sep 9, 2004 Issued
Array ( [id] => 7154711 [patent_doc_number] => 20050026370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Method and composite for decreasing charge leakage' [patent_app_type] => utility [patent_app_number] => 10/931581 [patent_app_country] => US [patent_app_date] => 2004-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3697 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20050026370.pdf [firstpage_image] =>[orig_patent_app_number] => 10931581 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931581
Method and composite for decreasing charge leakage Aug 30, 2004 Issued
Array ( [id] => 5903549 [patent_doc_number] => 20060046433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Thinning semiconductor wafers' [patent_app_type] => utility [patent_app_number] => 10/925775 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1696 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20060046433.pdf [firstpage_image] =>[orig_patent_app_number] => 10925775 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/925775
Thinning semiconductor wafers Aug 24, 2004 Abandoned
Array ( [id] => 7086611 [patent_doc_number] => 20050006723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Bipolar transistor' [patent_app_type] => utility [patent_app_number] => 10/912344 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6018 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20050006723.pdf [firstpage_image] =>[orig_patent_app_number] => 10912344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912344
Bipolar transistor Aug 3, 2004 Issued
Array ( [id] => 7104125 [patent_doc_number] => 20050106851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Wire bonding process for copper-metallized integrated circuits' [patent_app_type] => utility [patent_app_number] => 10/910454 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3978 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106851.pdf [firstpage_image] =>[orig_patent_app_number] => 10910454 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/910454
Wire bonding process for copper-metallized integrated circuits Aug 3, 2004 Abandoned
Array ( [id] => 535806 [patent_doc_number] => 07180150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'CMOS image sensor and method for detecting color sensitivity thereof' [patent_app_type] => utility [patent_app_number] => 10/901381 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5365 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/180/07180150.pdf [firstpage_image] =>[orig_patent_app_number] => 10901381 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/901381
CMOS image sensor and method for detecting color sensitivity thereof Jul 28, 2004 Issued
Array ( [id] => 946556 [patent_doc_number] => 06964888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-15 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/900134 [patent_app_country] => US [patent_app_date] => 2004-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 4028 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/964/06964888.pdf [firstpage_image] =>[orig_patent_app_number] => 10900134 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/900134
Semiconductor device and method for fabricating the same Jul 27, 2004 Issued
Array ( [id] => 7153178 [patent_doc_number] => 20050025927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Packaged component and manufacturing process thereof' [patent_app_type] => utility [patent_app_number] => 10/896001 [patent_app_country] => US [patent_app_date] => 2004-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7634 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20050025927.pdf [firstpage_image] =>[orig_patent_app_number] => 10896001 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/896001
Packaged component and manufacturing process thereof Jul 21, 2004 Abandoned
Array ( [id] => 701459 [patent_doc_number] => 07064013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Cap attach surface modification for improved adhesion' [patent_app_type] => utility [patent_app_number] => 10/883548 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4058 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064013.pdf [firstpage_image] =>[orig_patent_app_number] => 10883548 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883548
Cap attach surface modification for improved adhesion Jun 30, 2004 Issued
Array ( [id] => 493459 [patent_doc_number] => 07211471 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-01 [patent_title] => 'Exposed lead QFP package fabricated through the use of a partial saw process' [patent_app_type] => utility [patent_app_number] => 10/881846 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/211/07211471.pdf [firstpage_image] =>[orig_patent_app_number] => 10881846 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/881846
Exposed lead QFP package fabricated through the use of a partial saw process Jun 29, 2004 Issued
Array ( [id] => 7154841 [patent_doc_number] => 20050026433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Integrated circuit device and fabrication using metal-doped chalcogenide materials' [patent_app_type] => utility [patent_app_number] => 10/872773 [patent_app_country] => US [patent_app_date] => 2004-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5949 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20050026433.pdf [firstpage_image] =>[orig_patent_app_number] => 10872773 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/872773
Integrated circuit device and fabrication using metal-doped chalcogenide materials Jun 21, 2004 Abandoned
Array ( [id] => 687775 [patent_doc_number] => 07078769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Nonvolatile memory and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/866766 [patent_app_country] => US [patent_app_date] => 2004-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 57 [patent_no_of_words] => 12738 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078769.pdf [firstpage_image] =>[orig_patent_app_number] => 10866766 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/866766
Nonvolatile memory and manufacturing method thereof Jun 14, 2004 Issued
Array ( [id] => 7314329 [patent_doc_number] => 20040222504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Wafer level packaging' [patent_app_type] => new [patent_app_number] => 10/866448 [patent_app_country] => US [patent_app_date] => 2004-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2693 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222504.pdf [firstpage_image] =>[orig_patent_app_number] => 10866448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/866448
Wafer level packaging Jun 10, 2004 Issued
Array ( [id] => 7058904 [patent_doc_number] => 20050001263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Field-effect transistor, semiconductor device including field-effect transistor, and method for manufacturing field-effect transistor and semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/853121 [patent_app_country] => US [patent_app_date] => 2004-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2571 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20050001263.pdf [firstpage_image] =>[orig_patent_app_number] => 10853121 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/853121
Field-effect transistor, semiconductor device including field-effect transistor, and method for manufacturing field-effect transistor and semiconductor device May 25, 2004 Issued
Array ( [id] => 7429123 [patent_doc_number] => 20040209426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Method and composite for decreasing charge leakage' [patent_app_type] => new [patent_app_number] => 10/842229 [patent_app_country] => US [patent_app_date] => 2004-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3727 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209426.pdf [firstpage_image] =>[orig_patent_app_number] => 10842229 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/842229
Method and composite for decreasing charge leakage May 9, 2004 Issued
Array ( [id] => 7407561 [patent_doc_number] => 20040227243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Methods of pore sealing and metal encapsulation in porous low k interconnect' [patent_app_type] => new [patent_app_number] => 10/824754 [patent_app_country] => US [patent_app_date] => 2004-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4550 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20040227243.pdf [firstpage_image] =>[orig_patent_app_number] => 10824754 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/824754
Methods of pore sealing and metal encapsulation in porous low k interconnect Apr 14, 2004 Abandoned
Array ( [id] => 687773 [patent_doc_number] => 07078768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof' [patent_app_type] => utility [patent_app_number] => 10/815701 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 37 [patent_no_of_words] => 9269 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078768.pdf [firstpage_image] =>[orig_patent_app_number] => 10815701 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/815701
Semiconductor device equipped with semiconductor circuits composed of semiconductor elements and process for production thereof Apr 1, 2004 Issued
Array ( [id] => 7420518 [patent_doc_number] => 20040183065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Self-aligned junction passivation for superconductor integrated circuit' [patent_app_type] => new [patent_app_number] => 10/814512 [patent_app_country] => US [patent_app_date] => 2004-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4153 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20040183065.pdf [firstpage_image] =>[orig_patent_app_number] => 10814512 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/814512
Self-aligned junction passivation for superconductor integrated circuit Mar 31, 2004 Issued
Array ( [id] => 7393674 [patent_doc_number] => 20040173870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Manufacturing method of semiconductor device with filling insulating film into trench' [patent_app_type] => new [patent_app_number] => 10/799881 [patent_app_country] => US [patent_app_date] => 2004-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 13048 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20040173870.pdf [firstpage_image] =>[orig_patent_app_number] => 10799881 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/799881
Manufacturing method of semiconductor device with filling insulating film into trench Mar 14, 2004 Abandoned
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