Search

Norman Drew Richards

Supervisory Patent Examiner (ID: 164, Phone: (571)272-1736 , Office: P/2800 )

Most Active Art Unit
2815
Art Unit(s)
2892, 2815, 2895, 2816
Total Applications
491
Issued Applications
359
Pending Applications
28
Abandoned Applications
107

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7135122 [patent_doc_number] => 20040043570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Semiconductor device and process for producing the same' [patent_app_type] => new [patent_app_number] => 10/649613 [patent_app_country] => US [patent_app_date] => 2003-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5019 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043570.pdf [firstpage_image] =>[orig_patent_app_number] => 10649613 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/649613
Semiconductor device and process for producing the same Aug 27, 2003 Issued
Array ( [id] => 983473 [patent_doc_number] => 06927969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Circuit arrangement' [patent_app_type] => utility [patent_app_number] => 10/649962 [patent_app_country] => US [patent_app_date] => 2003-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1854 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927969.pdf [firstpage_image] =>[orig_patent_app_number] => 10649962 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/649962
Circuit arrangement Aug 26, 2003 Issued
Array ( [id] => 6988710 [patent_doc_number] => 20050087820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'High dielectric constant metal oxide gate dielectrics' [patent_app_type] => utility [patent_app_number] => 10/646034 [patent_app_country] => US [patent_app_date] => 2003-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4496 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20050087820.pdf [firstpage_image] =>[orig_patent_app_number] => 10646034 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/646034
High dielectric constant metal oxide gate dielectrics Aug 21, 2003 Issued
Array ( [id] => 7343246 [patent_doc_number] => 20040046201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Trench DRAM cell with vertical device and buried word lines' [patent_app_type] => new [patent_app_number] => 10/640387 [patent_app_country] => US [patent_app_date] => 2003-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4167 [patent_no_of_claims] => 94 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20040046201.pdf [firstpage_image] =>[orig_patent_app_number] => 10640387 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/640387
Trench DRAM cell with vertical device and buried word lines Aug 13, 2003 Issued
Array ( [id] => 7154700 [patent_doc_number] => 20050026364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Fabrication of dielectric for a nonvolatile memory cell having multiple floating gates' [patent_app_type] => utility [patent_app_number] => 10/631452 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6780 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20050026364.pdf [firstpage_image] =>[orig_patent_app_number] => 10631452 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631452
Fabrication of dielectric for a nonvolatile memory cell having multiple floating gates Jul 29, 2003 Issued
Array ( [id] => 7147500 [patent_doc_number] => 20050023519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Square-law detector based on spin injection and nanowires' [patent_app_type] => utility [patent_app_number] => 10/631951 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7598 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023519.pdf [firstpage_image] =>[orig_patent_app_number] => 10631951 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631951
Square-law detector based on spin injection and nanowires Jul 29, 2003 Issued
Array ( [id] => 948816 [patent_doc_number] => 06962852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-08 [patent_title] => 'Nonvolatile memories and methods of fabrication' [patent_app_type] => utility [patent_app_number] => 10/631552 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 43 [patent_no_of_words] => 5994 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/962/06962852.pdf [firstpage_image] =>[orig_patent_app_number] => 10631552 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631552
Nonvolatile memories and methods of fabrication Jul 29, 2003 Issued
Array ( [id] => 7295766 [patent_doc_number] => 20040124411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Semiconductor device capable of preventing a pattern collapse' [patent_app_type] => new [patent_app_number] => 10/630041 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1946 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124411.pdf [firstpage_image] =>[orig_patent_app_number] => 10630041 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/630041
Semiconductor device capable of preventing a pattern collapse Jul 29, 2003 Issued
Array ( [id] => 7611011 [patent_doc_number] => 06841846 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-11 [patent_title] => 'Antifuse structure and a method of forming an antifuse structure' [patent_app_type] => utility [patent_app_number] => 10/625491 [patent_app_country] => US [patent_app_date] => 2003-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1960 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841846.pdf [firstpage_image] =>[orig_patent_app_number] => 10625491 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/625491
Antifuse structure and a method of forming an antifuse structure Jul 21, 2003 Issued
Array ( [id] => 7398759 [patent_doc_number] => 20040018670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/622584 [patent_app_country] => US [patent_app_date] => 2003-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 20408 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20040018670.pdf [firstpage_image] =>[orig_patent_app_number] => 10622584 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/622584
Method of manufacturing semiconductor device Jul 20, 2003 Issued
Array ( [id] => 553586 [patent_doc_number] => 07160805 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-09 [patent_title] => 'Inter-layer interconnection structure for large electrical connections' [patent_app_type] => utility [patent_app_number] => 10/623082 [patent_app_country] => US [patent_app_date] => 2003-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4889 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/160/07160805.pdf [firstpage_image] =>[orig_patent_app_number] => 10623082 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/623082
Inter-layer interconnection structure for large electrical connections Jul 16, 2003 Issued
Array ( [id] => 1062752 [patent_doc_number] => 06849496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'DRAM with vertical transistor and trench capacitor memory cells and method of fabrication' [patent_app_type] => utility [patent_app_number] => 10/617511 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6126 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 607 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849496.pdf [firstpage_image] =>[orig_patent_app_number] => 10617511 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/617511
DRAM with vertical transistor and trench capacitor memory cells and method of fabrication Jul 10, 2003 Issued
Array ( [id] => 7295887 [patent_doc_number] => 20040124460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Stack gate electrode suppressed with interface-reaction and method for fabricating semiconductor device having the same' [patent_app_type] => new [patent_app_number] => 10/616302 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3590 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20040124460.pdf [firstpage_image] =>[orig_patent_app_number] => 10616302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/616302
Stack gate electrode suppressed with interface-reaction and method for fabricating semiconductor device having the same Jul 9, 2003 Abandoned
Array ( [id] => 467210 [patent_doc_number] => 07235436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-06-26 [patent_title] => 'Method for doping structures in FinFET devices' [patent_app_type] => utility [patent_app_number] => 10/614051 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2147 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/235/07235436.pdf [firstpage_image] =>[orig_patent_app_number] => 10614051 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/614051
Method for doping structures in FinFET devices Jul 7, 2003 Issued
Array ( [id] => 7161089 [patent_doc_number] => 20040075522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Microstructure and its fabrication method' [patent_app_type] => new [patent_app_number] => 10/608111 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8694 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20040075522.pdf [firstpage_image] =>[orig_patent_app_number] => 10608111 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/608111
Microstructure and its fabrication method Jun 29, 2003 Issued
Array ( [id] => 978906 [patent_doc_number] => 06929965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Early response to plasma/charging damage by special pattern design of active region' [patent_app_type] => utility [patent_app_number] => 10/462266 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 1929 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/929/06929965.pdf [firstpage_image] =>[orig_patent_app_number] => 10462266 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/462266
Early response to plasma/charging damage by special pattern design of active region Jun 15, 2003 Issued
Array ( [id] => 1046713 [patent_doc_number] => 06864107 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Determination of nonphotolithographic wafer process-splits in integrated circuit technology development' [patent_app_type] => utility [patent_app_number] => 10/459885 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2627 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864107.pdf [firstpage_image] =>[orig_patent_app_number] => 10459885 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459885
Determination of nonphotolithographic wafer process-splits in integrated circuit technology development Jun 10, 2003 Issued
Array ( [id] => 985475 [patent_doc_number] => 06924203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Double HBT base metal micro-bridge' [patent_app_type] => utility [patent_app_number] => 10/445612 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 4996 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924203.pdf [firstpage_image] =>[orig_patent_app_number] => 10445612 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/445612
Double HBT base metal micro-bridge May 26, 2003 Issued
Array ( [id] => 7388232 [patent_doc_number] => 20040016955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Floating gate and fabrication method therefor' [patent_app_type] => new [patent_app_number] => 10/441801 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2343 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20040016955.pdf [firstpage_image] =>[orig_patent_app_number] => 10441801 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441801
Floating gate and fabrication method therefor May 18, 2003 Issued
Array ( [id] => 7423739 [patent_doc_number] => 20040229453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Methods of pore sealing and metal encapsulation in porous low k interconnect' [patent_app_type] => new [patent_app_number] => 10/439415 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4509 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20040229453.pdf [firstpage_image] =>[orig_patent_app_number] => 10439415 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/439415
Methods of pore sealing and metal encapsulation in porous low k interconnect May 14, 2003 Abandoned
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