Norman M. Wright

Array ( [id] => 3122647 [patent_doc_number] => 05408650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Memory analysis system for dynamically displaying memory allocation and de-allocation events associated with an application program' [patent_app_type] => 1 [patent_app_number] => 8/084890 [patent_app_country] => US [patent_app_date] => 1993-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5841 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/408/05408650.pdf [firstpage_image] =>[orig_patent_app_number] => 084890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4305120 [patent_doc_number] => 06269453 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Method for reorganizing the data on a RAID-4 or RAID-5 array in the absence of one disk' [patent_app_type] => 1 [patent_app_number] => 8/084370 [patent_app_country] => US [patent_app_date] => 1993-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4344 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269453.pdf [firstpage_image] =>[orig_patent_app_number] => 084370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3841200 [patent_doc_number] => 05784554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Dynamic sampling profiler' [patent_app_type] => 1 [patent_app_number] => 8/068898 [patent_app_country] => US [patent_app_date] => 1993-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2096 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784554.pdf [firstpage_image] =>[orig_patent_app_number] => 068898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3439001 [patent_doc_number] => 05463636 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Semiconductor memory device with built-in confirmation unit for accelerating test' [patent_app_type] => 1 [patent_app_number] => 8/067980 [patent_app_country] => US [patent_app_date] => 1993-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4917 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463636.pdf [firstpage_image] =>[orig_patent_app_number] => 067980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3482446 [patent_doc_number] => 05477494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-19 [patent_title] => 'Apparatus for generating address bit patterns for testing semiconductor memory devices' [patent_app_type] => 1 [patent_app_number] => 8/067498 [patent_app_country] => US [patent_app_date] => 1993-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 4740 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/477/05477494.pdf [firstpage_image] =>[orig_patent_app_number] => 067498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3603044 [patent_doc_number] => 05586251 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Continuous on-local area network monitor' [patent_app_type] => 1 [patent_app_number] => 8/062358 [patent_app_country] => US [patent_app_date] => 1993-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4435 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586251.pdf [firstpage_image] =>[orig_patent_app_number] => 062358 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3986206 [patent_doc_number] => 05919266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Apparatus and method for fault tolerant operation of a multiprocessor data processing system' [patent_app_type] => 1 [patent_app_number] => 8/041770 [patent_app_country] => US [patent_app_date] => 1993-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3362 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/919/05919266.pdf [firstpage_image] =>[orig_patent_app_number] => 041770 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3590087 [patent_doc_number] => 05491786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-13 [patent_title] => 'Method and system for management of units within a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/030760 [patent_app_country] => US [patent_app_date] => 1993-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4364 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/491/05491786.pdf [firstpage_image] =>[orig_patent_app_number] => 030760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3118023 [patent_doc_number] => 05448722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-05 [patent_title] => 'Method and system for data processing system error diagnosis utilizing hierarchical blackboard diagnostic sessions' [patent_app_type] => 1 [patent_app_number] => 8/029072 [patent_app_country] => US [patent_app_date] => 1993-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5218 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/448/05448722.pdf [firstpage_image] =>[orig_patent_app_number] => 029072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3441082 [patent_doc_number] => 05463767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Data transfer control unit with memory unit fault detection capability' [patent_app_type] => 1 [patent_app_number] => 8/021680 [patent_app_country] => US [patent_app_date] => 1993-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3065 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463767.pdf [firstpage_image] =>[orig_patent_app_number] => 021680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3567670 [patent_doc_number] => 05502729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-26 [patent_title] => 'Method of testing for stuck-at fault in a synchronous circuit' [patent_app_type] => 1 [patent_app_number] => 8/010180 [patent_app_country] => US [patent_app_date] => 1993-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 5226 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/502/05502729.pdf [firstpage_image] =>[orig_patent_app_number] => 010180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3431445 [patent_doc_number] => 05390191 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-14 [patent_title] => 'Apparatus and method for testing the interconnection between integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/006760 [patent_app_country] => US [patent_app_date] => 1993-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/390/05390191.pdf [firstpage_image] =>[orig_patent_app_number] => 006760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3122739 [patent_doc_number] => 05465348 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-07 [patent_title] => 'Trouble diagnosis system of UPC circuit' [patent_app_type] => 1 [patent_app_number] => 8/002772 [patent_app_country] => US [patent_app_date] => 1993-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 10186 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/465/05465348.pdf [firstpage_image] =>[orig_patent_app_number] => 002772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3587239 [patent_doc_number] => 05524115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Input/output selection circuit of column repair' [patent_app_type] => 1 [patent_app_number] => 7/998060 [patent_app_country] => US [patent_app_date] => 1992-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1627 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/524/05524115.pdf [firstpage_image] =>[orig_patent_app_number] => 998060 [rel_patent_id] =>[rel_patent_doc_number] =>)