
Nova M. Chapman
Examiner (ID: 7572)
| Most Active Art Unit | 3928 |
| Art Unit(s) | 3928 |
| Total Applications | 504 |
| Issued Applications | 0 |
| Pending Applications | 504 |
| Abandoned Applications | 0 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18757521
[patent_doc_number] => 20230360984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => Semiconductor Package Comprising Structures Configured to Withstand a Change of the Volume of a Potting Compound
[patent_app_type] => utility
[patent_app_number] => 18/142106
[patent_app_country] => US
[patent_app_date] => 2023-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4050
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142106
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/142106 | Semiconductor Package Comprising Structures Configured to Withstand a Change of the Volume of a Potting Compound | May 1, 2023 | Pending |
Array
(
[id] => 19546422
[patent_doc_number] => 20240363458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => CIRCUIT CHIPS INCORPORATING NEGATIVE POISSON`S RATIO STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/309408
[patent_app_country] => US
[patent_app_date] => 2023-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5798
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309408
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/309408 | CIRCUIT CHIPS INCORPORATING NEGATIVE POISSON`S RATIO STRUCTURES | Apr 27, 2023 | Pending |
Array
(
[id] => 18757465
[patent_doc_number] => 20230360927
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-09
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING DEVICE AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/140375
[patent_app_country] => US
[patent_app_date] => 2023-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3509
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140375
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/140375 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING DEVICE AND SYSTEM | Apr 26, 2023 | Pending |
Array
(
[id] => 19023132
[patent_doc_number] => 20240079303
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => SEMICONDUCTOR PACKAGE SUBSTRATE WITH HYBRID CORE STRUCTURE AND METHODS FOR MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/303663
[patent_app_country] => US
[patent_app_date] => 2023-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8861
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303663
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/303663 | SEMICONDUCTOR PACKAGE SUBSTRATE WITH HYBRID CORE STRUCTURE AND METHODS FOR MAKING THE SAME | Apr 19, 2023 | Pending |
Array
(
[id] => 19071200
[patent_doc_number] => 20240105626
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => Semiconductor Package with Local Interconnect and Chiplet Integration
[patent_app_type] => utility
[patent_app_number] => 18/296587
[patent_app_country] => US
[patent_app_date] => 2023-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5642
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18296587
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/296587 | Semiconductor Package with Local Interconnect and Chiplet Integration | Apr 5, 2023 | Pending |
Array
(
[id] => 18729375
[patent_doc_number] => 20230343671
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-26
[patent_title] => CERAMIC SUBSTRATE AND CERAMIC DIVIDED SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/126844
[patent_app_country] => US
[patent_app_date] => 2023-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4419
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18126844
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/126844 | CERAMIC SUBSTRATE AND CERAMIC DIVIDED SUBSTRATE | Mar 26, 2023 | Pending |
Array
(
[id] => 19007875
[patent_doc_number] => 20240071946
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => Electromagnetic Interference Shield with Thermal Conductivity
[patent_app_type] => utility
[patent_app_number] => 18/169662
[patent_app_country] => US
[patent_app_date] => 2023-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6703
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18169662
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/169662 | Electromagnetic Interference Shield with Thermal Conductivity | Feb 14, 2023 | Pending |
Array
(
[id] => 19384646
[patent_doc_number] => 20240274516
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => INTERPOSER WITH SOLDER RESIST POSTS
[patent_app_type] => utility
[patent_app_number] => 18/168420
[patent_app_country] => US
[patent_app_date] => 2023-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7825
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168420
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/168420 | INTERPOSER WITH SOLDER RESIST POSTS | Feb 12, 2023 | Pending |
Array
(
[id] => 18570534
[patent_doc_number] => 20230260871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => Three-Dimensional Device Package with Vertical Heat Pipes
[patent_app_type] => utility
[patent_app_number] => 18/167912
[patent_app_country] => US
[patent_app_date] => 2023-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8495
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167912
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/167912 | Three-Dimensional Device Package with Vertical Heat Pipes | Feb 12, 2023 | Pending |
Array
(
[id] => 18540839
[patent_doc_number] => 20230245950
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-03
[patent_title] => HEAT DISSIPATING SYSTEM FOR ELECTRONIC DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/160979
[patent_app_country] => US
[patent_app_date] => 2023-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7759
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18160979
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/160979 | HEAT DISSIPATING SYSTEM FOR ELECTRONIC DEVICES | Jan 26, 2023 | Pending |
Array
(
[id] => 18533253
[patent_doc_number] => 20230238329
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-27
[patent_title] => INTERCONNECT STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/158233
[patent_app_country] => US
[patent_app_date] => 2023-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7416
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18158233
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/158233 | INTERCONNECT STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME | Jan 22, 2023 | Pending |
Array
(
[id] => 18379759
[patent_doc_number] => 20230154848
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/093497
[patent_app_country] => US
[patent_app_date] => 2023-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3566
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18093497
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/093497 | SEMICONDUCTOR STRUCTURE | Jan 4, 2023 | Pending |
Array
(
[id] => 18743423
[patent_doc_number] => 20230352411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-02
[patent_title] => SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/090856
[patent_app_country] => US
[patent_app_date] => 2022-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7421
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090856
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/090856 | SEMICONDUCTOR PACKAGE AND ELECTRONIC DEVICE INCLUDING THE SAME | Dec 28, 2022 | Pending |
Array
(
[id] => 18473114
[patent_doc_number] => 20230207402
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => DIRECTLY BONDED FRAME WAFERS
[patent_app_type] => utility
[patent_app_number] => 18/146326
[patent_app_country] => US
[patent_app_date] => 2022-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14760
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146326
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/146326 | DIRECTLY BONDED FRAME WAFERS | Dec 22, 2022 | Pending |
Array
(
[id] => 19252815
[patent_doc_number] => 20240203812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/067375
[patent_app_country] => US
[patent_app_date] => 2022-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19473
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 413
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067375
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/067375 | SEMICONDUCTOR DEVICE | Dec 15, 2022 | Pending |
Array
(
[id] => 19760205
[patent_doc_number] => 20250048770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => PHOTOVOLTAIC CELL ELEMENT, PHOTOVOLTAIC CELL AND METHODS FOR MANUFACTURING SUCH ELEMENT AND CELL
[patent_app_type] => utility
[patent_app_number] => 18/719589
[patent_app_country] => US
[patent_app_date] => 2022-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4317
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18719589
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/719589 | PHOTOVOLTAIC CELL ELEMENT, PHOTOVOLTAIC CELL AND METHODS FOR MANUFACTURING SUCH ELEMENT AND CELL | Dec 5, 2022 | Pending |
Array
(
[id] => 18514639
[patent_doc_number] => 20230230899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-20
[patent_title] => SEMICONDUCTOR APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/070943
[patent_app_country] => US
[patent_app_date] => 2022-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9272
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070943
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/070943 | SEMICONDUCTOR APPARATUS | Nov 28, 2022 | Pending |
Array
(
[id] => 18409086
[patent_doc_number] => 20230170439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => LIGHT-EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/985607
[patent_app_country] => US
[patent_app_date] => 2022-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7287
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17985607
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/985607 | LIGHT-EMITTING DEVICE | Nov 10, 2022 | Pending |
Array
(
[id] => 19116581
[patent_doc_number] => 20240128331
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => BOTTOM ENHANCED LINER-LESS VIA CONTACT FOR REDUCED MOL RESISTANCE
[patent_app_type] => utility
[patent_app_number] => 17/965254
[patent_app_country] => US
[patent_app_date] => 2022-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6582
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965254
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/965254 | BOTTOM ENHANCED LINER-LESS VIA CONTACT FOR REDUCED MOL RESISTANCE | Oct 12, 2022 | Pending |
Array
(
[id] => 18655246
[patent_doc_number] => 20230301097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-21
[patent_title] => SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/949485
[patent_app_country] => US
[patent_app_date] => 2022-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10126
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 325
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949485
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/949485 | SEMICONDUCTOR MEMORY DEVICE | Sep 20, 2022 | Pending |