Search

Octavian Rotaru

Examiner (ID: 9637, Phone: (571)270-7950 , Office: P/3624 )

Most Active Art Unit
3624
Art Unit(s)
3624
Total Applications
478
Issued Applications
123
Pending Applications
75
Abandoned Applications
289

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10867086 [patent_doc_number] => 08892811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Reducing write amplification in a flash memory' [patent_app_type] => utility [patent_app_number] => 13/409458 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409458 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/409458
Reducing write amplification in a flash memory Feb 29, 2012 Issued
Array ( [id] => 8383244 [patent_doc_number] => 20120226868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'SYSTEMS AND METHODS FOR PROVIDING DETERMINISTIC EXECUTION' [patent_app_type] => utility [patent_app_number] => 13/410212 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5228 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410212 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/410212
Systems and methods for providing deterministic execution Feb 29, 2012 Issued
Array ( [id] => 10054200 [patent_doc_number] => 09094090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Decentralized caching system' [patent_app_type] => utility [patent_app_number] => 13/409705 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409705 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/409705
Decentralized caching system Feb 29, 2012 Issued
Array ( [id] => 9017356 [patent_doc_number] => 20130232320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'PERSISTENT PREFETCH DATA STREAM SETTINGS' [patent_app_type] => utility [patent_app_number] => 13/410260 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410260 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/410260
Persistent prefetch data stream settings Feb 29, 2012 Issued
Array ( [id] => 9992605 [patent_doc_number] => 09037826 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-19 [patent_title] => 'System for optimization of input/output from a storage array' [patent_app_type] => utility [patent_app_number] => 13/408816 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5232 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408816 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/408816
System for optimization of input/output from a storage array Feb 28, 2012 Issued
Array ( [id] => 8672401 [patent_doc_number] => 20130046939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'COUPLED LOCK ALLOCATION AND LOOKUP FOR SHARED DATA SYNCHRONIZATION IN SYMMETRIC MULTITHREADING ENVIRONMENTS' [patent_app_type] => utility [patent_app_number] => 13/408263 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3170 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408263 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/408263
Coupled lock allocation and lookup for shared data synchronization in symmetric multithreading environments Feb 28, 2012 Issued
Array ( [id] => 9878907 [patent_doc_number] => 08966204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Data migration between memory locations' [patent_app_type] => utility [patent_app_number] => 13/408276 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408276 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/408276
Data migration between memory locations Feb 28, 2012 Issued
Array ( [id] => 9006090 [patent_doc_number] => 20130227215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'PROVIDING RECORD LEVEL SHARING (RLS) TO INDIVIDUAL CATALOGS' [patent_app_type] => utility [patent_app_number] => 13/408978 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8231 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408978 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/408978
Providing record level sharing (RLS) to individual catalogs Feb 28, 2012 Issued
Array ( [id] => 10867103 [patent_doc_number] => 08892829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Methods, systems, and computer readable media for integrated sub-block interleaving and rate matching' [patent_app_type] => utility [patent_app_number] => 13/408787 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6134 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13408787 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/408787
Methods, systems, and computer readable media for integrated sub-block interleaving and rate matching Feb 28, 2012 Issued
Array ( [id] => 8242436 [patent_doc_number] => 20120151172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'PROVIDING FRAME START INDICATION IN A MEMORY SYSTEM HAVING INDETERMINATE READ DATA LATENCY' [patent_app_type] => utility [patent_app_number] => 13/397827 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11927 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397827 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397827
Providing frame start indication in a memory system having indeterminate read data latency Feb 15, 2012 Issued
Array ( [id] => 8242437 [patent_doc_number] => 20120151171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'PROVIDING FRAME START INDICATION IN A MEMORY SYSTEM HAVING INDETERMINATE READ DATA LATENCY' [patent_app_type] => utility [patent_app_number] => 13/397819 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11926 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397819 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397819
Providing frame start indication in a memory system having indeterminate read data latency Feb 15, 2012 Issued
Array ( [id] => 8945941 [patent_doc_number] => 08499128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'Methods for implementation of an active archive in an archiving system and managing the data in the active archive' [patent_app_type] => utility [patent_app_number] => 13/369765 [patent_app_country] => US [patent_app_date] => 2012-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 14230 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369765 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/369765
Methods for implementation of an active archive in an archiving system and managing the data in the active archive Feb 8, 2012 Issued
Array ( [id] => 8985065 [patent_doc_number] => 08516195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Extract cache attribute facility and instruction therefore' [patent_app_type] => utility [patent_app_number] => 13/368363 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 16233 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368363 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/368363
Extract cache attribute facility and instruction therefore Feb 7, 2012 Issued
Array ( [id] => 9695338 [patent_doc_number] => 08825966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Reduced pin count interface' [patent_app_type] => utility [patent_app_number] => 13/364685 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6814 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364685 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/364685
Reduced pin count interface Feb 1, 2012 Issued
Array ( [id] => 8639511 [patent_doc_number] => 20130031314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'Support for Multiple Coherence Domains' [patent_app_type] => utility [patent_app_number] => 13/361441 [patent_app_country] => US [patent_app_date] => 2012-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8376 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13361441 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/361441
Support for Multiple Coherence Domains Jan 29, 2012 Abandoned
Array ( [id] => 9123696 [patent_doc_number] => 20130290618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'HIGHER-LEVEL REDUNDANCY INFORMATION COMPUTATION' [patent_app_type] => utility [patent_app_number] => 13/979805 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 27966 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13979805 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/979805
Higher-level redundancy information computation Jan 17, 2012 Issued
Array ( [id] => 8189170 [patent_doc_number] => 20120117347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'INITIALIZING OF A MEMORY AREA' [patent_app_type] => utility [patent_app_number] => 13/352274 [patent_app_country] => US [patent_app_date] => 2012-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117347.pdf [firstpage_image] =>[orig_patent_app_number] => 13352274 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/352274
Initializing of a memory area Jan 16, 2012 Issued
Array ( [id] => 8923867 [patent_doc_number] => 08489816 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-16 [patent_title] => 'Predicting and optimizing I/O performance characteristics in a multi-level caching system' [patent_app_type] => utility [patent_app_number] => 13/349224 [patent_app_country] => US [patent_app_date] => 2012-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13349224 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/349224
Predicting and optimizing I/O performance characteristics in a multi-level caching system Jan 11, 2012 Issued
Array ( [id] => 8176570 [patent_doc_number] => 20120110295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'Keeping File Systems or Partitions Private in a Memory Device' [patent_app_type] => utility [patent_app_number] => 13/347949 [patent_app_country] => US [patent_app_date] => 2012-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4342 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20120110295.pdf [firstpage_image] =>[orig_patent_app_number] => 13347949 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/347949
Keeping file systems or partitions private in a memory device Jan 10, 2012 Issued
Array ( [id] => 8045831 [patent_doc_number] => 20120072651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'MEMORY CONTROLLER INTERFACE' [patent_app_type] => utility [patent_app_number] => 13/302524 [patent_app_country] => US [patent_app_date] => 2011-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14028 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20120072651.pdf [firstpage_image] =>[orig_patent_app_number] => 13302524 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/302524
Memory controller interface Nov 21, 2011 Issued
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