
Octavian Rotaru
Examiner (ID: 9637, Phone: (571)270-7950 , Office: P/3624 )
| Most Active Art Unit | 3624 |
| Art Unit(s) | 3624 |
| Total Applications | 478 |
| Issued Applications | 123 |
| Pending Applications | 75 |
| Abandoned Applications | 289 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6363427
[patent_doc_number] => 20100250851
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'MULTI-PROCESSOR SYSTEM DEVICE AND METHOD DECLARING AND USING VARIABLES'
[patent_app_type] => utility
[patent_app_number] => 12/724671
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3646
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0250/20100250851.pdf
[firstpage_image] =>[orig_patent_app_number] => 12724671
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724671 | Multi-processor system device and method declaring and using variables | Mar 15, 2010 | Issued |
Array
(
[id] => 6413479
[patent_doc_number] => 20100306491
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'Data storage device'
[patent_app_type] => utility
[patent_app_number] => 12/661352
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3938
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0306/20100306491.pdf
[firstpage_image] =>[orig_patent_app_number] => 12661352
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/661352 | Data storage device | Mar 15, 2010 | Abandoned |
Array
(
[id] => 7694960
[patent_doc_number] => 20110231630
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'ADDRESS MAPPING IN VIRTUALIZED PROCESSING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/724912
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4138
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0231/20110231630.pdf
[firstpage_image] =>[orig_patent_app_number] => 12724912
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724912 | Address mapping in virtualized processing system | Mar 15, 2010 | Issued |
Array
(
[id] => 8763190
[patent_doc_number] => 08423727
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-16
[patent_title] => 'I/O conversion method and apparatus for storage system'
[patent_app_type] => utility
[patent_app_number] => 12/724655
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 25
[patent_no_of_words] => 7186
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12724655
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724655 | I/O conversion method and apparatus for storage system | Mar 15, 2010 | Issued |
Array
(
[id] => 7694978
[patent_doc_number] => 20110231612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'PRE-FETCHING FOR A SIBLING CACHE'
[patent_app_type] => utility
[patent_app_number] => 12/724639
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7524
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0231/20110231612.pdf
[firstpage_image] =>[orig_patent_app_number] => 12724639
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724639 | Pre-fetching for a sibling cache | Mar 15, 2010 | Issued |
Array
(
[id] => 8260001
[patent_doc_number] => 08209516
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-26
[patent_title] => 'Method and system for dual mode access for storage devices'
[patent_app_type] => utility
[patent_app_number] => 12/714237
[patent_app_country] => US
[patent_app_date] => 2010-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 7691
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12714237
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714237 | Method and system for dual mode access for storage devices | Feb 25, 2010 | Issued |
Array
(
[id] => 8716092
[patent_doc_number] => 08402243
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-19
[patent_title] => 'Dynamically allocating number of bits per cell for memory locations of a non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 12/712540
[patent_app_country] => US
[patent_app_date] => 2010-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 6585
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12712540
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/712540 | Dynamically allocating number of bits per cell for memory locations of a non-volatile memory | Feb 24, 2010 | Issued |
Array
(
[id] => 6043261
[patent_doc_number] => 20110204932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-25
[patent_title] => 'Asynchronous Scheme for Clock Domain Crossing'
[patent_app_type] => utility
[patent_app_number] => 12/711909
[patent_app_country] => US
[patent_app_date] => 2010-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 14528
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0204/20110204932.pdf
[firstpage_image] =>[orig_patent_app_number] => 12711909
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711909 | Asynchronous scheme for clock domain crossing | Feb 23, 2010 | Issued |
Array
(
[id] => 6448367
[patent_doc_number] => 20100153663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-17
[patent_title] => 'MEMORY ACCESS SYSTEM AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/711454
[patent_app_country] => US
[patent_app_date] => 2010-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 8321
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20100153663.pdf
[firstpage_image] =>[orig_patent_app_number] => 12711454
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711454 | MEMORY ACCESS SYSTEM AND METHOD | Feb 23, 2010 | Abandoned |
Array
(
[id] => 6052135
[patent_doc_number] => 20110208909
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-25
[patent_title] => 'REDUCTION OF I/O LATENCY FOR WRITABLE COPY-ON-WRITE SNAPSHOT FUNCTION'
[patent_app_type] => utility
[patent_app_number] => 12/711643
[patent_app_country] => US
[patent_app_date] => 2010-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 8450
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0208/20110208909.pdf
[firstpage_image] =>[orig_patent_app_number] => 12711643
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711643 | Reduction of I/O latency for writable copy-on-write snapshot function | Feb 23, 2010 | Issued |
Array
(
[id] => 6531659
[patent_doc_number] => 20100217916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-26
[patent_title] => 'METHOD AND APPARATUS FOR FACILITATING COMMUNICATION BETWEEN VIRTUAL MACHINES'
[patent_app_type] => utility
[patent_app_number] => 12/711775
[patent_app_country] => US
[patent_app_date] => 2010-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6601
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20100217916.pdf
[firstpage_image] =>[orig_patent_app_number] => 12711775
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711775 | Method and apparatus for facilitating communication between virtual machines | Feb 23, 2010 | Issued |
Array
(
[id] => 8438154
[patent_doc_number] => 08285937
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-09
[patent_title] => 'Fused store exclusive/memory barrier operation'
[patent_app_type] => utility
[patent_app_number] => 12/711941
[patent_app_country] => US
[patent_app_date] => 2010-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 10257
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12711941
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/711941 | Fused store exclusive/memory barrier operation | Feb 23, 2010 | Issued |
Array
(
[id] => 6523127
[patent_doc_number] => 20100211735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-19
[patent_title] => 'STORAGE SYSTEM, STORAGE CONTROL DEVICE, RECEPTION CONTROL DEVICE, AND CONTROL METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/706336
[patent_app_country] => US
[patent_app_date] => 2010-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9099
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0211/20100211735.pdf
[firstpage_image] =>[orig_patent_app_number] => 12706336
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/706336 | STORAGE SYSTEM, STORAGE CONTROL DEVICE, RECEPTION CONTROL DEVICE, AND CONTROL METHOD | Feb 15, 2010 | Abandoned |
Array
(
[id] => 8449117
[patent_doc_number] => 08291184
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-16
[patent_title] => 'Copy control apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/706334
[patent_app_country] => US
[patent_app_date] => 2010-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3763
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12706334
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/706334 | Copy control apparatus | Feb 15, 2010 | Issued |
Array
(
[id] => 6523269
[patent_doc_number] => 20100211746
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-19
[patent_title] => 'CACHE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/706362
[patent_app_country] => US
[patent_app_date] => 2010-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 12758
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0211/20100211746.pdf
[firstpage_image] =>[orig_patent_app_number] => 12706362
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/706362 | Cache device | Feb 15, 2010 | Issued |
Array
(
[id] => 6531633
[patent_doc_number] => 20100217914
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-26
[patent_title] => 'MEMORY ACCESS DETERMINATION CIRCUIT, MEMORY ACCESS DETERMINATION METHOD AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/705666
[patent_app_country] => US
[patent_app_date] => 2010-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 6955
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20100217914.pdf
[firstpage_image] =>[orig_patent_app_number] => 12705666
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705666 | Memory access determination circuit, memory access determination method and electronic device | Feb 14, 2010 | Issued |
Array
(
[id] => 6530387
[patent_doc_number] => 20100287327
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-11
[patent_title] => 'COMPUTING SYSTEMS AND METHODS FOR MANAGING FLASH MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/705641
[patent_app_country] => US
[patent_app_date] => 2010-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8055
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0287/20100287327.pdf
[firstpage_image] =>[orig_patent_app_number] => 12705641
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705641 | Computing systems and methods for managing flash memory device | Feb 14, 2010 | Issued |
Array
(
[id] => 8626946
[patent_doc_number] => 08359450
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-22
[patent_title] => 'Memory utilization analysis'
[patent_app_type] => utility
[patent_app_number] => 12/705570
[patent_app_country] => US
[patent_app_date] => 2010-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 7477
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12705570
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705570 | Memory utilization analysis | Feb 12, 2010 | Issued |
Array
(
[id] => 8331541
[patent_doc_number] => 08239617
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-08-07
[patent_title] => 'Enterprise data storage system using multi-level cell flash memory'
[patent_app_type] => utility
[patent_app_number] => 12/705471
[patent_app_country] => US
[patent_app_date] => 2010-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 4967
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12705471
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705471 | Enterprise data storage system using multi-level cell flash memory | Feb 11, 2010 | Issued |
Array
(
[id] => 8343029
[patent_doc_number] => 08244967
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-14
[patent_title] => 'Method to rewrite flash memory with exclusively activated two blocks and optical transceiver implementing controller performing the same'
[patent_app_type] => utility
[patent_app_number] => 12/705377
[patent_app_country] => US
[patent_app_date] => 2010-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3080
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12705377
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705377 | Method to rewrite flash memory with exclusively activated two blocks and optical transceiver implementing controller performing the same | Feb 11, 2010 | Issued |