Search

Octavian Rotaru

Examiner (ID: 9637, Phone: (571)270-7950 , Office: P/3624 )

Most Active Art Unit
3624
Art Unit(s)
3624
Total Applications
478
Issued Applications
123
Pending Applications
75
Abandoned Applications
289

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5510275 [patent_doc_number] => 20090083482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-26 [patent_title] => 'Increasing the speed at which flash memory is written and read' [patent_app_type] => utility [patent_app_number] => 11/859686 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3198 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20090083482.pdf [firstpage_image] =>[orig_patent_app_number] => 11859686 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859686
Increasing the speed at which flash memory is written and read Sep 20, 2007 Abandoned
Array ( [id] => 5510286 [patent_doc_number] => 20090083493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-26 [patent_title] => 'SUPPORT FOR MULTIPLE COHERENCE DOMAINS' [patent_app_type] => utility [patent_app_number] => 11/859198 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8351 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20090083493.pdf [firstpage_image] =>[orig_patent_app_number] => 11859198 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859198
Support for multiple coherence domains Sep 20, 2007 Issued
Array ( [id] => 4712840 [patent_doc_number] => 20080301366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'RAID SYSTEM AND DATA TRANSFER METHOD IN RAID SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/859411 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7733 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20080301366.pdf [firstpage_image] =>[orig_patent_app_number] => 11859411 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859411
Raid system and data transfer method in raid system Sep 20, 2007 Issued
Array ( [id] => 4798922 [patent_doc_number] => 20080010508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'BACKUP DEVICE' [patent_app_type] => utility [patent_app_number] => 11/859424 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4833 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20080010508.pdf [firstpage_image] =>[orig_patent_app_number] => 11859424 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859424
BACKUP DEVICE Sep 20, 2007 Abandoned
Array ( [id] => 7972033 [patent_doc_number] => 07941594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'SDRAM sharing using a control surrogate' [patent_app_type] => utility [patent_app_number] => 11/859696 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/941/07941594.pdf [firstpage_image] =>[orig_patent_app_number] => 11859696 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859696
SDRAM sharing using a control surrogate Sep 20, 2007 Issued
Array ( [id] => 8775369 [patent_doc_number] => 08429345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Method, control logic and system for detecting a virtual storage volume and data carrier' [patent_app_type] => utility [patent_app_number] => 12/443874 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3452 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12443874 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/443874
Method, control logic and system for detecting a virtual storage volume and data carrier Sep 13, 2007 Issued
Array ( [id] => 37495 [patent_doc_number] => 07793056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Method of maintaining a data log related to a Programmable Logic Controller (PLC)' [patent_app_type] => utility [patent_app_number] => 11/899115 [patent_app_country] => US [patent_app_date] => 2007-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5457 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/793/07793056.pdf [firstpage_image] =>[orig_patent_app_number] => 11899115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/899115
Method of maintaining a data log related to a Programmable Logic Controller (PLC) Sep 3, 2007 Issued
Array ( [id] => 4585746 [patent_doc_number] => 07856539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Method regarding a data log related to a programmable logic controller (PLC)' [patent_app_type] => utility [patent_app_number] => 11/899114 [patent_app_country] => US [patent_app_date] => 2007-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5490 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/856/07856539.pdf [firstpage_image] =>[orig_patent_app_number] => 11899114 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/899114
Method regarding a data log related to a programmable logic controller (PLC) Sep 3, 2007 Issued
Array ( [id] => 5200704 [patent_doc_number] => 20070300022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Method regarding a memory device for a programmable logic controller (PLC)' [patent_app_type] => utility [patent_app_number] => 11/899157 [patent_app_country] => US [patent_app_date] => 2007-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5437 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20070300022.pdf [firstpage_image] =>[orig_patent_app_number] => 11899157 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/899157
Method regarding a memory device for a programmable logic controller (PLC) Sep 3, 2007 Issued
Array ( [id] => 156192 [patent_doc_number] => 07680994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Automatically managing the state of replicated data of a computing environment, and methods therefor' [patent_app_type] => utility [patent_app_number] => 11/847792 [patent_app_country] => US [patent_app_date] => 2007-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 10919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/680/07680994.pdf [firstpage_image] =>[orig_patent_app_number] => 11847792 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/847792
Automatically managing the state of replicated data of a computing environment, and methods therefor Aug 29, 2007 Issued
Array ( [id] => 8728254 [patent_doc_number] => 08407395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Scalable memory system' [patent_app_type] => utility [patent_app_number] => 11/843440 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 15891 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11843440 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843440
Scalable memory system Aug 21, 2007 Issued
Array ( [id] => 8033557 [patent_doc_number] => 08145868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Method and system for providing frame start indication in a memory system having indeterminate read data latency' [patent_app_type] => utility [patent_app_number] => 11/843150 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11899 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/145/08145868.pdf [firstpage_image] =>[orig_patent_app_number] => 11843150 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843150
Method and system for providing frame start indication in a memory system having indeterminate read data latency Aug 21, 2007 Issued
Array ( [id] => 7779815 [patent_doc_number] => 08122202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Reduced pin count interface' [patent_app_type] => utility [patent_app_number] => 11/843024 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6776 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122202.pdf [firstpage_image] =>[orig_patent_app_number] => 11843024 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843024
Reduced pin count interface Aug 21, 2007 Issued
Array ( [id] => 4626721 [patent_doc_number] => 08006032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Optimal solution to control data channels' [patent_app_type] => utility [patent_app_number] => 11/843434 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4733 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/006/08006032.pdf [firstpage_image] =>[orig_patent_app_number] => 11843434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843434
Optimal solution to control data channels Aug 21, 2007 Issued
Array ( [id] => 4549496 [patent_doc_number] => 07873794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Mechanism that provides efficient multi-word load atomicity' [patent_app_type] => utility [patent_app_number] => 11/842335 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2370 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/873/07873794.pdf [firstpage_image] =>[orig_patent_app_number] => 11842335 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842335
Mechanism that provides efficient multi-word load atomicity Aug 20, 2007 Issued
Array ( [id] => 5339116 [patent_doc_number] => 20090055580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'MULTI-LEVEL DRAM CONTROLLER TO MANAGE ACCESS TO DRAM' [patent_app_type] => utility [patent_app_number] => 11/842772 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20090055580.pdf [firstpage_image] =>[orig_patent_app_number] => 11842772 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842772
Multi-level DRAM controller to manage access to DRAM Aug 20, 2007 Issued
Array ( [id] => 5339156 [patent_doc_number] => 20090055620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'DEFECT MANAGEMENT USING MUTABLE LOGICAL TO PHYSICAL ASSOCIATION' [patent_app_type] => utility [patent_app_number] => 11/842653 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11251 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20090055620.pdf [firstpage_image] =>[orig_patent_app_number] => 11842653 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842653
Defect management using mutable logical to physical association Aug 20, 2007 Issued
Array ( [id] => 6409218 [patent_doc_number] => 20100180098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'CONFIGURABLE DECODER WITH APPLICATIONS IN FPGAS' [patent_app_type] => utility [patent_app_number] => 12/310217 [patent_app_country] => US [patent_app_date] => 2007-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 20773 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20100180098.pdf [firstpage_image] =>[orig_patent_app_number] => 12310217 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/310217
Configurable decoder with applications in FPGAs Aug 19, 2007 Issued
Array ( [id] => 5086975 [patent_doc_number] => 20070277026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'PROCESSOR, METHOD, AND DATA PROCESSING SYSTEM EMPLOYING A VARIABLE STORE GATHER WINDOW' [patent_app_type] => utility [patent_app_number] => 11/836872 [patent_app_country] => US [patent_app_date] => 2007-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3447 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20070277026.pdf [firstpage_image] =>[orig_patent_app_number] => 11836872 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/836872
Variable store gather window Aug 9, 2007 Issued
Array ( [id] => 4888971 [patent_doc_number] => 20080263303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'LINEAR COMBINER WEIGHT MEMORY' [patent_app_type] => utility [patent_app_number] => 11/736404 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3345 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263303.pdf [firstpage_image] =>[orig_patent_app_number] => 11736404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736404
Linear combiner weight memory Apr 16, 2007 Issued
Menu