Search

Olik Chaudhuri

Supervisory Patent Examiner (ID: 12363, Phone: (571)272-9820 , Office: P/2823 )

Most Active Art Unit
1104
Art Unit(s)
1107, 1104, 2823, 1106, 2814
Total Applications
949
Issued Applications
761
Pending Applications
4
Abandoned Applications
184

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2584786 [patent_doc_number] => 04925808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-15 [patent_title] => 'Method for making IC die with dielectric isolation' [patent_app_type] => 1 [patent_app_number] => 7/328211 [patent_app_country] => US [patent_app_date] => 1989-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 2778 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/925/04925808.pdf [firstpage_image] =>[orig_patent_app_number] => 328211 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/328211
Method for making IC die with dielectric isolation Mar 23, 1989 Issued
Array ( [id] => 2595280 [patent_doc_number] => 04923821 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-08 [patent_title] => 'Forming trench in semiconductor substrate with rounded corners' [patent_app_type] => 1 [patent_app_number] => 7/327234 [patent_app_country] => US [patent_app_date] => 1989-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 5063 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/923/04923821.pdf [firstpage_image] =>[orig_patent_app_number] => 327234 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/327234
Forming trench in semiconductor substrate with rounded corners Mar 21, 1989 Issued
07/323866 METHOD FOR THE PRODUCTION OF POLYCRYSTALLINE LAYERS HAVING GRANULAR CRYSTALLINE STRUCTURE FOR THIN-FILM SEMICONDUCTOR COMPONENTS SUCH AS SOLAR CELLS Mar 14, 1989 Abandoned
Array ( [id] => 2628299 [patent_doc_number] => 04916082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-10 [patent_title] => 'Method of preventing dielectric degradation or rupture' [patent_app_type] => 1 [patent_app_number] => 7/322945 [patent_app_country] => US [patent_app_date] => 1989-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2406 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/916/04916082.pdf [firstpage_image] =>[orig_patent_app_number] => 322945 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/322945
Method of preventing dielectric degradation or rupture Mar 13, 1989 Issued
Array ( [id] => 2561051 [patent_doc_number] => 04857481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-15 [patent_title] => 'Method of fabricating airbridge metal interconnects' [patent_app_type] => 1 [patent_app_number] => 7/322943 [patent_app_country] => US [patent_app_date] => 1989-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 1537 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/857/04857481.pdf [firstpage_image] =>[orig_patent_app_number] => 322943 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/322943
Method of fabricating airbridge metal interconnects Mar 13, 1989 Issued
Array ( [id] => 2475675 [patent_doc_number] => 04889820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-26 [patent_title] => 'Method of producing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/321201 [patent_app_country] => US [patent_app_date] => 1989-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 2589 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/889/04889820.pdf [firstpage_image] =>[orig_patent_app_number] => 321201 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/321201
Method of producing a semiconductor device Mar 8, 1989 Issued
Array ( [id] => 2587631 [patent_doc_number] => 04927771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-22 [patent_title] => 'Method of thermal isolation of detector elements in an uncooled staring focal plane array' [patent_app_type] => 1 [patent_app_number] => 7/319788 [patent_app_country] => US [patent_app_date] => 1989-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1223 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/927/04927771.pdf [firstpage_image] =>[orig_patent_app_number] => 319788 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/319788
Method of thermal isolation of detector elements in an uncooled staring focal plane array Mar 6, 1989 Issued
Array ( [id] => 2523585 [patent_doc_number] => 04883768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-28 [patent_title] => 'Mesa fabrication in semiconductor structures' [patent_app_type] => 1 [patent_app_number] => 7/317309 [patent_app_country] => US [patent_app_date] => 1989-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2458 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/883/04883768.pdf [firstpage_image] =>[orig_patent_app_number] => 317309 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/317309
Mesa fabrication in semiconductor structures Feb 27, 1989 Issued
Array ( [id] => 2555354 [patent_doc_number] => 04897364 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-30 [patent_title] => 'Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer' [patent_app_type] => 1 [patent_app_number] => 7/315866 [patent_app_country] => US [patent_app_date] => 1989-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3627 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/897/04897364.pdf [firstpage_image] =>[orig_patent_app_number] => 315866 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/315866
Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer Feb 26, 1989 Issued
07/313370 CATALYTIC CRACKING WITH FRAMEWORK ALUMINUM EXTRACTED ZEOLITE Feb 20, 1989 Abandoned
Array ( [id] => 2712999 [patent_doc_number] => 05053345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Method of edge doping SOI islands' [patent_app_type] => 1 [patent_app_number] => 7/306356 [patent_app_country] => US [patent_app_date] => 1989-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1661 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053345.pdf [firstpage_image] =>[orig_patent_app_number] => 306356 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/306356
Method of edge doping SOI islands Feb 19, 1989 Issued
Array ( [id] => 2595259 [patent_doc_number] => 04923820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-08 [patent_title] => 'IC which eliminates support bias influence on dielectrically isolated components' [patent_app_type] => 1 [patent_app_number] => 7/311812 [patent_app_country] => US [patent_app_date] => 1989-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2058 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/923/04923820.pdf [firstpage_image] =>[orig_patent_app_number] => 311812 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/311812
IC which eliminates support bias influence on dielectrically isolated components Feb 16, 1989 Issued
Array ( [id] => 2479411 [patent_doc_number] => 04882293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-21 [patent_title] => 'Method of making an electrically programmable integrated circuit containing meltable contact bridges' [patent_app_type] => 1 [patent_app_number] => 7/312358 [patent_app_country] => US [patent_app_date] => 1989-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1376 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/882/04882293.pdf [firstpage_image] =>[orig_patent_app_number] => 312358 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/312358
Method of making an electrically programmable integrated circuit containing meltable contact bridges Feb 14, 1989 Issued
Array ( [id] => 2600827 [patent_doc_number] => 04931405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-05 [patent_title] => 'Method for manufacturing a semiconductor device and suppressing the generation of bulk microdefects near the substrate surface layer' [patent_app_type] => 1 [patent_app_number] => 7/306716 [patent_app_country] => US [patent_app_date] => 1989-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3323 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/931/04931405.pdf [firstpage_image] =>[orig_patent_app_number] => 306716 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/306716
Method for manufacturing a semiconductor device and suppressing the generation of bulk microdefects near the substrate surface layer Feb 5, 1989 Issued
Array ( [id] => 2595967 [patent_doc_number] => 04921812 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-01 [patent_title] => 'Process of fabricating field effect transistor device' [patent_app_type] => 1 [patent_app_number] => 7/305771 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3016 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 432 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/921/04921812.pdf [firstpage_image] =>[orig_patent_app_number] => 305771 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/305771
Process of fabricating field effect transistor device Feb 2, 1989 Issued
Array ( [id] => 2636252 [patent_doc_number] => 04914046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-03 [patent_title] => 'Polycrystalline silicon device electrode and method' [patent_app_type] => 1 [patent_app_number] => 7/305590 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2395 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/914/04914046.pdf [firstpage_image] =>[orig_patent_app_number] => 305590 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/305590
Polycrystalline silicon device electrode and method Feb 2, 1989 Issued
Array ( [id] => 2600903 [patent_doc_number] => 04931409 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-05 [patent_title] => 'Method of manufacturing semiconductor device having trench isolation' [patent_app_type] => 1 [patent_app_number] => 7/302915 [patent_app_country] => US [patent_app_date] => 1989-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 6 [patent_no_of_words] => 5788 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/931/04931409.pdf [firstpage_image] =>[orig_patent_app_number] => 302915 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/302915
Method of manufacturing semiconductor device having trench isolation Jan 29, 1989 Issued
Array ( [id] => 2680061 [patent_doc_number] => 05004701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-02 [patent_title] => 'Method of forming isolation region in integrated circuit semiconductor device' [patent_app_type] => 1 [patent_app_number] => 7/303721 [patent_app_country] => US [patent_app_date] => 1989-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 2678 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/004/05004701.pdf [firstpage_image] =>[orig_patent_app_number] => 303721 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/303721
Method of forming isolation region in integrated circuit semiconductor device Jan 26, 1989 Issued
Array ( [id] => 2666492 [patent_doc_number] => 04904608 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-27 [patent_title] => 'Pin photodiode having a low leakage current' [patent_app_type] => 1 [patent_app_number] => 7/297821 [patent_app_country] => US [patent_app_date] => 1989-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 4725 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/904/04904608.pdf [firstpage_image] =>[orig_patent_app_number] => 297821 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297821
Pin photodiode having a low leakage current Jan 16, 1989 Issued
Array ( [id] => 2475836 [patent_doc_number] => 04889829 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-26 [patent_title] => 'Method for producing a semiconductor device having a silicon-on-insulator structure' [patent_app_type] => 1 [patent_app_number] => 7/297376 [patent_app_country] => US [patent_app_date] => 1989-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 3229 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/889/04889829.pdf [firstpage_image] =>[orig_patent_app_number] => 297376 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297376
Method for producing a semiconductor device having a silicon-on-insulator structure Jan 16, 1989 Issued
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