Search

Olivia T. Luk

Examiner (ID: 10459)

Most Active Art Unit
2812
Art Unit(s)
2812
Total Applications
278
Issued Applications
256
Pending Applications
8
Abandoned Applications
14

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7630653 [patent_doc_number] => 06636283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-21 [patent_title] => 'Front light, reflective liquid crystal display device and personal digital assistant' [patent_app_type] => B2 [patent_app_number] => 09/819624 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 76 [patent_no_of_words] => 16814 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636283.pdf [firstpage_image] =>[orig_patent_app_number] => 09819624 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819624
Front light, reflective liquid crystal display device and personal digital assistant Mar 28, 2001 Issued
Array ( [id] => 1397420 [patent_doc_number] => 06531403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-11 [patent_title] => 'Method of etching an object, method of repairing pattern, nitride pattern and semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/819891 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 71 [patent_no_of_words] => 15713 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531403.pdf [firstpage_image] =>[orig_patent_app_number] => 09819891 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819891
Method of etching an object, method of repairing pattern, nitride pattern and semiconductor device Mar 28, 2001 Issued
Array ( [id] => 7645636 [patent_doc_number] => 06472333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-29 [patent_title] => 'Silicon carbide cap layers for low dielectric constant silicon oxide layers' [patent_app_type] => B2 [patent_app_number] => 09/820439 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4720 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472333.pdf [firstpage_image] =>[orig_patent_app_number] => 09820439 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/820439
Silicon carbide cap layers for low dielectric constant silicon oxide layers Mar 27, 2001 Issued
Array ( [id] => 1594772 [patent_doc_number] => 06383953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Apparatus for fabricating semiconductor device and method for fabricating semiconductor using the same' [patent_app_type] => B2 [patent_app_number] => 09/804902 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3805 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383953.pdf [firstpage_image] =>[orig_patent_app_number] => 09804902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/804902
Apparatus for fabricating semiconductor device and method for fabricating semiconductor using the same Mar 12, 2001 Issued
Array ( [id] => 1602660 [patent_doc_number] => 06432839 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Film forming method and manufacturing method of semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/804142 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 6304 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/432/06432839.pdf [firstpage_image] =>[orig_patent_app_number] => 09804142 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/804142
Film forming method and manufacturing method of semiconductor device Mar 12, 2001 Issued
Array ( [id] => 1594385 [patent_doc_number] => 06383874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'In-situ stack for high volume production of isolation regions' [patent_app_type] => B1 [patent_app_number] => 09/800862 [patent_app_country] => US [patent_app_date] => 2001-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2870 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383874.pdf [firstpage_image] =>[orig_patent_app_number] => 09800862 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/800862
In-situ stack for high volume production of isolation regions Mar 6, 2001 Issued
Array ( [id] => 4376913 [patent_doc_number] => 06303399 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Method of sample preparation for electron microscopy' [patent_app_type] => 1 [patent_app_number] => 9/800441 [patent_app_country] => US [patent_app_date] => 2001-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3340 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303399.pdf [firstpage_image] =>[orig_patent_app_number] => 800441 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/800441
Method of sample preparation for electron microscopy Mar 5, 2001 Issued
09/743071 Process for mapping metal contaminant concentration on a silicon wafer surface Mar 4, 2001 Abandoned
Array ( [id] => 1535953 [patent_doc_number] => 06337220 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Ion implanter vacuum integrity check process and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/796771 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3236 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337220.pdf [firstpage_image] =>[orig_patent_app_number] => 09796771 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796771
Ion implanter vacuum integrity check process and apparatus Feb 27, 2001 Issued
Array ( [id] => 6896059 [patent_doc_number] => 20010026849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Method of improving moisture resistance of low dielectric constant films' [patent_app_type] => new [patent_app_number] => 09/792122 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11451 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026849.pdf [firstpage_image] =>[orig_patent_app_number] => 09792122 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792122
Method of improving moisture resistance of low dielectric constant films Feb 20, 2001 Issued
Array ( [id] => 4304333 [patent_doc_number] => 06326306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Method of forming copper dual damascene structure' [patent_app_type] => 1 [patent_app_number] => 9/783872 [patent_app_country] => US [patent_app_date] => 2001-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1798 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326306.pdf [firstpage_image] =>[orig_patent_app_number] => 783872 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/783872
Method of forming copper dual damascene structure Feb 14, 2001 Issued
Array ( [id] => 1594477 [patent_doc_number] => 06383897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-07 [patent_title] => 'Apparatus for manufacturing a semiconductor device in a CVD reactive chamber' [patent_app_type] => B2 [patent_app_number] => 09/769473 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 9423 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383897.pdf [firstpage_image] =>[orig_patent_app_number] => 09769473 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/769473
Apparatus for manufacturing a semiconductor device in a CVD reactive chamber Jan 25, 2001 Issued
Array ( [id] => 6012328 [patent_doc_number] => 20020100947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Method for forming variable-K gate dielectric' [patent_app_type] => new [patent_app_number] => 09/769811 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20020100947.pdf [firstpage_image] =>[orig_patent_app_number] => 09769811 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/769811
Method for forming variable-K gate dielectric Jan 25, 2001 Issued
Array ( [id] => 7643893 [patent_doc_number] => 06429145 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Method of determining electrical properties of silicon-on-insulator wafers' [patent_app_type] => B1 [patent_app_number] => 09/770955 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3752 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429145.pdf [firstpage_image] =>[orig_patent_app_number] => 09770955 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/770955
Method of determining electrical properties of silicon-on-insulator wafers Jan 25, 2001 Issued
Array ( [id] => 6961437 [patent_doc_number] => 20010012701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Method of forming a silicon nitride thin film' [patent_app_type] => new [patent_app_number] => 09/767682 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1521 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20010012701.pdf [firstpage_image] =>[orig_patent_app_number] => 09767682 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/767682
Method of forming a silicon nitride thin film Jan 23, 2001 Abandoned
Array ( [id] => 6898555 [patent_doc_number] => 20010046720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'Method of detecting and monitoring stresses in a semiconductor wafer' [patent_app_type] => new [patent_app_number] => 09/767980 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2158 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20010046720.pdf [firstpage_image] =>[orig_patent_app_number] => 09767980 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/767980
Method of detecting and monitoring stresses in a semiconductor wafer Jan 22, 2001 Issued
Array ( [id] => 1485055 [patent_doc_number] => 06365422 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Automated variation of stepper exposure dose based upon across wafer variations in device characteristics, and system for accomplishing same' [patent_app_type] => B1 [patent_app_number] => 09/766737 [patent_app_country] => US [patent_app_date] => 2001-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5286 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365422.pdf [firstpage_image] =>[orig_patent_app_number] => 09766737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/766737
Automated variation of stepper exposure dose based upon across wafer variations in device characteristics, and system for accomplishing same Jan 21, 2001 Issued
Array ( [id] => 7640344 [patent_doc_number] => 06395569 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Method for characterization of LDMOS devices at the die reference plane' [patent_app_type] => B1 [patent_app_number] => 09/760571 [patent_app_country] => US [patent_app_date] => 2001-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1843 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/395/06395569.pdf [firstpage_image] =>[orig_patent_app_number] => 09760571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/760571
Method for characterization of LDMOS devices at the die reference plane Jan 14, 2001 Issued
Array ( [id] => 1412465 [patent_doc_number] => 06524936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-25 [patent_title] => 'Process for removal of photoresist after post ion implantation' [patent_app_type] => B2 [patent_app_number] => 09/742721 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3600 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/524/06524936.pdf [firstpage_image] =>[orig_patent_app_number] => 09742721 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/742721
Process for removal of photoresist after post ion implantation Dec 21, 2000 Issued
Array ( [id] => 1469700 [patent_doc_number] => 06406925 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Method and apparatus for minimizing semiconductor wafer arcing during semiconductor wafer processing' [patent_app_type] => B1 [patent_app_number] => 09/712707 [patent_app_country] => US [patent_app_date] => 2000-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2444 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/406/06406925.pdf [firstpage_image] =>[orig_patent_app_number] => 09712707 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/712707
Method and apparatus for minimizing semiconductor wafer arcing during semiconductor wafer processing Nov 13, 2000 Issued
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