
Olivia T. Luk
Examiner (ID: 10459)
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812 |
| Total Applications | 278 |
| Issued Applications | 256 |
| Pending Applications | 8 |
| Abandoned Applications | 14 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1458804
[patent_doc_number] => 06426269
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-30
[patent_title] => 'Dummy feature reduction using optical proximity effect correction'
[patent_app_type] => B1
[patent_app_number] => 09/422634
[patent_app_country] => US
[patent_app_date] => 1999-10-21
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[pdf_file] => patents/06/426/06426269.pdf
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Array
(
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[patent_doc_number] => 06455334
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[patent_issue_date] => 2002-09-24
[patent_title] => 'Probe grid for integrated circuit analysis'
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[patent_app_number] => 09/409982
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/409982 | Probe grid for integrated circuit analysis | Sep 29, 1999 | Issued |
Array
(
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[patent_doc_number] => 06268241
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[patent_kind] => NA
[patent_issue_date] => 2001-07-31
[patent_title] => 'Method of forming a self-aligned silicide structure in integrated circuit fabrication'
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[patent_app_number] => 9/408152
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[patent_app_date] => 1999-09-29
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[pdf_file] => patents/06/268/06268241.pdf
[firstpage_image] =>[orig_patent_app_number] => 408152
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/408152 | Method of forming a self-aligned silicide structure in integrated circuit fabrication | Sep 28, 1999 | Issued |
Array
(
[id] => 4407679
[patent_doc_number] => 06300145
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[patent_issue_date] => 2001-10-09
[patent_title] => 'Ion implantation and laser anneal to create n-doped structures in silicon'
[patent_app_type] => 1
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[patent_app_date] => 1999-09-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/408051 | Ion implantation and laser anneal to create n-doped structures in silicon | Sep 28, 1999 | Issued |
Array
(
[id] => 4380517
[patent_doc_number] => 06277659
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[patent_issue_date] => 2001-08-21
[patent_title] => 'Substrate removal using thermal analysis'
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Array
(
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[patent_doc_number] => 06242273
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[patent_title] => 'Fractal filter applied to a contamination-free manufacturing signal to improve signal-to-noise ratios'
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[patent_app_number] => 9/408232
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[firstpage_image] =>[orig_patent_app_number] => 408232
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/408232 | Fractal filter applied to a contamination-free manufacturing signal to improve signal-to-noise ratios | Sep 28, 1999 | Issued |
Array
(
[id] => 1602550
[patent_doc_number] => 06432729
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[patent_issue_date] => 2002-08-13
[patent_title] => 'Method for characterization of microelectronic feature quality'
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[pdf_file] => patents/06/432/06432729.pdf
[firstpage_image] =>[orig_patent_app_number] => 09408419
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/408419 | Method for characterization of microelectronic feature quality | Sep 28, 1999 | Issued |
Array
(
[id] => 4376869
[patent_doc_number] => 06303396
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[patent_issue_date] => 2001-10-16
[patent_title] => 'Substrate removal as a function of resistance at the back side of a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/408881
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/408881 | Substrate removal as a function of resistance at the back side of a semiconductor device | Sep 28, 1999 | Issued |
Array
(
[id] => 1527971
[patent_doc_number] => 06479305
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[patent_kind] => B2
[patent_issue_date] => 2002-11-12
[patent_title] => 'Semiconductor device manufacturing method'
[patent_app_type] => B2
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/396732 | Semiconductor device manufacturing method | Sep 14, 1999 | Issued |
Array
(
[id] => 1459175
[patent_doc_number] => 06391663
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[patent_issue_date] => 2002-05-21
[patent_title] => 'Methods of sensing temperature of an electronic device workpiece and methods of semiconductor processing'
[patent_app_type] => B1
[patent_app_number] => 09/389924
[patent_app_country] => US
[patent_app_date] => 1999-09-03
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[pdf_file] => patents/06/391/06391663.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/389924 | Methods of sensing temperature of an electronic device workpiece and methods of semiconductor processing | Sep 2, 1999 | Abandoned |
Array
(
[id] => 1585701
[patent_doc_number] => 06358862
[patent_country] => US
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[patent_title] => 'Passivation integrity improvements'
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Array
(
[id] => 4380711
[patent_doc_number] => 06294395
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[patent_issue_date] => 2001-09-25
[patent_title] => 'Back side reactive ion etch'
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Array
(
[id] => 4266186
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[patent_title] => 'Tool for handling a workpiece'
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Array
(
[id] => 4350777
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[patent_title] => 'Protective oxide buffer layer for ARC removal'
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Array
(
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Array
(
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[patent_title] => 'Semiconductor device having a passivation layer and method for its fabrication'
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Array
(
[id] => 1370865
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Array
(
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/305332 | Low stress method and apparatus of underfilling flip-chip electronic devices | Apr 29, 1999 | Issued |