Olivia T. Luk

Array ( [id] => 4369693 [patent_doc_number] => 06287987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Method and apparatus for deposition of porous silica dielectrics' [patent_app_type] => 1 [patent_app_number] => 9/302832 [patent_app_country] => US [patent_app_date] => 1999-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3275 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/287/06287987.pdf [firstpage_image] =>[orig_patent_app_number] => 302832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4357593 [patent_doc_number] => 06255125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Method and apparatus for compensating for critical dimension variations in the production of a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/277093 [patent_app_country] => US [patent_app_date] => 1999-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 4128 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255125.pdf [firstpage_image] =>[orig_patent_app_number] => 277093 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4182090 [patent_doc_number] => 06150210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Memory cell that includes a vertical transistor and a trench capacitor' [patent_app_type] => 1 [patent_app_number] => 9/272218 [patent_app_country] => US [patent_app_date] => 1999-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 6154 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150210.pdf [firstpage_image] =>[orig_patent_app_number] => 272218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4404317 [patent_doc_number] => 06271056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Stacked semiconductor package and method of fabrication' [patent_app_type] => 1 [patent_app_number] => 9/259861 [patent_app_country] => US [patent_app_date] => 1999-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 5139 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271056.pdf [firstpage_image] =>[orig_patent_app_number] => 259861 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4294136 [patent_doc_number] => 06184098 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Field effect transistor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/252862 [patent_app_country] => US [patent_app_date] => 1999-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184098.pdf [firstpage_image] =>[orig_patent_app_number] => 252862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4354044 [patent_doc_number] => 06200823 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Method for isolation of optical defect images' [patent_app_type] => 1 [patent_app_number] => 9/247241 [patent_app_country] => US [patent_app_date] => 1999-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2601 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/200/06200823.pdf [firstpage_image] =>[orig_patent_app_number] => 247241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4311873 [patent_doc_number] => 06242270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Method of manufacturing integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/247783 [patent_app_country] => US [patent_app_date] => 1999-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3676 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242270.pdf [firstpage_image] =>[orig_patent_app_number] => 247783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4357579 [patent_doc_number] => 06255124 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Test arrangement and method for thinned flip chip IC' [patent_app_type] => 1 [patent_app_number] => 9/247002 [patent_app_country] => US [patent_app_date] => 1999-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/255/06255124.pdf [firstpage_image] =>[orig_patent_app_number] => 247002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4412614 [patent_doc_number] => 06239450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Negative differential resistance device based on tunneling through microclusters, and method therefor' [patent_app_type] => 1 [patent_app_number] => 9/231429 [patent_app_country] => US [patent_app_date] => 1999-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1122 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/239/06239450.pdf [firstpage_image] =>[orig_patent_app_number] => 231429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4275985 [patent_doc_number] => 06281120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Temperature control structure for integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/216282 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3415 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281120.pdf [firstpage_image] =>[orig_patent_app_number] => 216282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4419200 [patent_doc_number] => 06177289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-23 [patent_title] => 'Lateral trench optical detectors' [patent_app_type] => 1 [patent_app_number] => 9/205433 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1996 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/177/06177289.pdf [firstpage_image] =>[orig_patent_app_number] => 205433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4343235 [patent_doc_number] => 06284552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-04 [patent_title] => 'Method and apparatus for evaluating surface roughness of an epitaxial growth layer, method and apparatus for measuring reflectance of an epitaxial growth layer, and manufacturing method of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/190461 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 8148 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/284/06284552.pdf [firstpage_image] =>[orig_patent_app_number] => 190461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1549577 [patent_doc_number] => 06346428 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Method and apparatus for minimizing semiconductor wafer arcing during semiconductor wafer processing' [patent_app_type] => B1 [patent_app_number] => 09/135210 [patent_app_country] => US [patent_app_date] => 1998-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2427 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346428.pdf [firstpage_image] =>[orig_patent_app_number] => 09135210 [rel_patent_id] =>[rel_patent_doc_number] =>)