Search

Olivia T. Luk

Examiner (ID: 8315)

Most Active Art Unit
2812
Art Unit(s)
2812
Total Applications
278
Issued Applications
256
Pending Applications
8
Abandoned Applications
14

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7280848 [patent_doc_number] => 20040063225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'MEASUREMENT OF LATERAL DIFFUSION OF DIFFUSED LAYERS' [patent_app_type] => new [patent_app_number] => 10/253121 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8754 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20040063225.pdf [firstpage_image] =>[orig_patent_app_number] => 10253121 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253121
Measurement of lateral diffusion of diffused layers Sep 22, 2002 Issued
Array ( [id] => 1115473 [patent_doc_number] => 06800495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-05 [patent_title] => 'Lot-optimized wafer level burn-in' [patent_app_type] => B2 [patent_app_number] => 10/251091 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/800/06800495.pdf [firstpage_image] =>[orig_patent_app_number] => 10251091 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/251091
Lot-optimized wafer level burn-in Sep 19, 2002 Issued
Array ( [id] => 6674361 [patent_doc_number] => 20030059964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Electric-circuit fabricating method and system, and electric-circuit fabricating program' [patent_app_type] => new [patent_app_number] => 10/245371 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16920 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20030059964.pdf [firstpage_image] =>[orig_patent_app_number] => 10245371 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245371
Electric-circuit fabricating method and system, and electric-circuit fabricating program Sep 17, 2002 Issued
Array ( [id] => 1358145 [patent_doc_number] => 06573112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => B2 [patent_app_number] => 10/238690 [patent_app_country] => US [patent_app_date] => 2002-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8488 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573112.pdf [firstpage_image] =>[orig_patent_app_number] => 10238690 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/238690
Semiconductor device manufacturing method Sep 10, 2002 Issued
Array ( [id] => 1024640 [patent_doc_number] => 06884737 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-26 [patent_title] => 'Method and apparatus for precursor delivery utilizing the melting point depression of solid deposition precursors in the presence of supercritical fluids' [patent_app_type] => utility [patent_app_number] => 10/232491 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4670 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/884/06884737.pdf [firstpage_image] =>[orig_patent_app_number] => 10232491 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232491
Method and apparatus for precursor delivery utilizing the melting point depression of solid deposition precursors in the presence of supercritical fluids Aug 29, 2002 Issued
Array ( [id] => 1177646 [patent_doc_number] => 06743737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Method of improving moisture resistance of low dielectric constant films' [patent_app_type] => B2 [patent_app_number] => 10/226717 [patent_app_country] => US [patent_app_date] => 2002-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 0 [patent_no_of_words] => 11367 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/743/06743737.pdf [firstpage_image] =>[orig_patent_app_number] => 10226717 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/226717
Method of improving moisture resistance of low dielectric constant films Aug 21, 2002 Issued
Array ( [id] => 1024477 [patent_doc_number] => 06884638 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-26 [patent_title] => 'METHOD OF FABRICATING A FLASH MEMORY SEMICONDUCTOR DEVICE BY DETERMINING THE ACTIVE REGION WIDTH BETWEEN SHALLOW TRENCH ISOLATION STRUCTURES USING AN OVERDRIVE CURRENT MEASUREMENT TECHNIQUE AND A DEVICE THEREBY FABRICATED' [patent_app_type] => utility [patent_app_number] => 10/225052 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3539 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/884/06884638.pdf [firstpage_image] =>[orig_patent_app_number] => 10225052 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/225052
METHOD OF FABRICATING A FLASH MEMORY SEMICONDUCTOR DEVICE BY DETERMINING THE ACTIVE REGION WIDTH BETWEEN SHALLOW TRENCH ISOLATION STRUCTURES USING AN OVERDRIVE CURRENT MEASUREMENT TECHNIQUE AND A DEVICE THEREBY FABRICATED Aug 19, 2002 Issued
Array ( [id] => 1126753 [patent_doc_number] => 06790787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Structure having narrow pores' [patent_app_type] => B2 [patent_app_number] => 10/222901 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 43 [patent_no_of_words] => 9715 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/790/06790787.pdf [firstpage_image] =>[orig_patent_app_number] => 10222901 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/222901
Structure having narrow pores Aug 18, 2002 Issued
Array ( [id] => 1123221 [patent_doc_number] => 06794203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method of calculating the real added defect counts' [patent_app_type] => B2 [patent_app_number] => 10/218591 [patent_app_country] => US [patent_app_date] => 2002-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2036 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794203.pdf [firstpage_image] =>[orig_patent_app_number] => 10218591 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/218591
Method of calculating the real added defect counts Aug 14, 2002 Issued
10/110179 Method and device for treating substrates Aug 8, 2002 Abandoned
Array ( [id] => 1123491 [patent_doc_number] => 06794300 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Mechanically scanned wet chemical processing' [patent_app_type] => B1 [patent_app_number] => 10/213531 [patent_app_country] => US [patent_app_date] => 2002-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2927 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794300.pdf [firstpage_image] =>[orig_patent_app_number] => 10213531 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/213531
Mechanically scanned wet chemical processing Aug 6, 2002 Issued
Array ( [id] => 7269979 [patent_doc_number] => 20040058497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Methods for improving within-wafer uniformity of gate oxide' [patent_app_type] => new [patent_app_number] => 10/214251 [patent_app_country] => US [patent_app_date] => 2002-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0058/20040058497.pdf [firstpage_image] =>[orig_patent_app_number] => 10214251 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/214251
Methods for improving within-wafer uniformity of gate oxide Aug 6, 2002 Issued
Array ( [id] => 1151651 [patent_doc_number] => 06767752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Temperature control method and semiconductor device manufacturing method' [patent_app_type] => B2 [patent_app_number] => 10/212146 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4808 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/767/06767752.pdf [firstpage_image] =>[orig_patent_app_number] => 10212146 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212146
Temperature control method and semiconductor device manufacturing method Aug 5, 2002 Issued
Array ( [id] => 7400308 [patent_doc_number] => 20040023420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Method for reduced photoresist usage' [patent_app_type] => new [patent_app_number] => 10/210032 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1650 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20040023420.pdf [firstpage_image] =>[orig_patent_app_number] => 10210032 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/210032
Method for reduced photoresist usage Aug 1, 2002 Abandoned
Array ( [id] => 1119860 [patent_doc_number] => 06797622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Selective etching of polysilicon' [patent_app_type] => B2 [patent_app_number] => 10/210461 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1060 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/797/06797622.pdf [firstpage_image] =>[orig_patent_app_number] => 10210461 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/210461
Selective etching of polysilicon Jul 30, 2002 Issued
Array ( [id] => 1104707 [patent_doc_number] => 06812046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Method and apparatus for electronically aligning capacitively coupled chip pads' [patent_app_type] => B2 [patent_app_number] => 10/207671 [patent_app_country] => US [patent_app_date] => 2002-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 4212 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812046.pdf [firstpage_image] =>[orig_patent_app_number] => 10207671 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/207671
Method and apparatus for electronically aligning capacitively coupled chip pads Jul 28, 2002 Issued
Array ( [id] => 7398826 [patent_doc_number] => 20040018684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Method of etching a dielectric material in the presence of polysilicon' [patent_app_type] => new [patent_app_number] => 10/202992 [patent_app_country] => US [patent_app_date] => 2002-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4184 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20040018684.pdf [firstpage_image] =>[orig_patent_app_number] => 10202992 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202992
Method of etching a dielectric material in the presence of polysilicon Jul 24, 2002 Issued
Array ( [id] => 1126737 [patent_doc_number] => 06790779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Anisotropic dry etching technique for deep bulk silicon etching' [patent_app_type] => B2 [patent_app_number] => 10/202331 [patent_app_country] => US [patent_app_date] => 2002-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 0 [patent_no_of_words] => 3355 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/790/06790779.pdf [firstpage_image] =>[orig_patent_app_number] => 10202331 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202331
Anisotropic dry etching technique for deep bulk silicon etching Jul 23, 2002 Issued
Array ( [id] => 662570 [patent_doc_number] => 07101721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-05 [patent_title] => 'Adaptive manufacturing for film bulk acoustic wave resonators' [patent_app_type] => utility [patent_app_number] => 10/200237 [patent_app_country] => US [patent_app_date] => 2002-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 2272 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/101/07101721.pdf [firstpage_image] =>[orig_patent_app_number] => 10200237 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/200237
Adaptive manufacturing for film bulk acoustic wave resonators Jul 21, 2002 Issued
Array ( [id] => 6111359 [patent_doc_number] => 20020173106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Method for forming variable-K gate dielectric' [patent_app_type] => new [patent_app_number] => 10/196111 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20020173106.pdf [firstpage_image] =>[orig_patent_app_number] => 10196111 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/196111
Method for forming variable-K gate dielectric Jul 15, 2002 Issued
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