
Omar F. Mojaddedi
Examiner (ID: 14818, Phone: (313)446-6582 , Office: P/2898 )
| Most Active Art Unit | 2898 |
| Art Unit(s) | 2898, 2811 |
| Total Applications | 737 |
| Issued Applications | 595 |
| Pending Applications | 128 |
| Abandoned Applications | 54 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19767443
[patent_doc_number] => 12225759
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-11
[patent_title] => Display substrate and method for manufacturing the same, display device
[patent_app_type] => utility
[patent_app_number] => 18/510068
[patent_app_country] => US
[patent_app_date] => 2023-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 14805
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 290
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510068
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/510068 | Display substrate and method for manufacturing the same, display device | Nov 14, 2023 | Issued |
Array
(
[id] => 19006969
[patent_doc_number] => 20240071040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => ARTIFICIAL INTELLIGENCE-ENABLED PREPARATION END-POINTING
[patent_app_type] => utility
[patent_app_number] => 18/503554
[patent_app_country] => US
[patent_app_date] => 2023-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8192
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18503554
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/503554 | ARTIFICIAL INTELLIGENCE-ENABLED PREPARATION END-POINTING | Nov 6, 2023 | Pending |
Array
(
[id] => 18991319
[patent_doc_number] => 20240063288
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => GATE ETCH BACK WITH REDUCED LOADING EFFECT
[patent_app_type] => utility
[patent_app_number] => 18/501554
[patent_app_country] => US
[patent_app_date] => 2023-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10633
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501554
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/501554 | GATE ETCH BACK WITH REDUCED LOADING EFFECT | Nov 2, 2023 | Pending |
Array
(
[id] => 19132850
[patent_doc_number] => 20240138203
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 18/492870
[patent_app_country] => US
[patent_app_date] => 2023-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20843
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492870
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/492870 | DISPLAY PANEL | Oct 23, 2023 | Pending |
Array
(
[id] => 19132850
[patent_doc_number] => 20240138203
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 18/492870
[patent_app_country] => US
[patent_app_date] => 2023-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20843
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492870
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/492870 | DISPLAY PANEL | Oct 22, 2023 | Pending |
Array
(
[id] => 19788574
[patent_doc_number] => 20250062253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => RF SWITCH DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/489927
[patent_app_country] => US
[patent_app_date] => 2023-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6012
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489927
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/489927 | RF SWITCH DEVICE AND MANUFACTURING METHOD THEREOF | Oct 18, 2023 | Pending |
Array
(
[id] => 18956992
[patent_doc_number] => 20240045319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-08
[patent_title] => REFLECTIVE MASK BLANK FOR EUV LITHOGRAPHY, MASK BLANK FOR EUV LITHOGRAPHY, AND MANUFACTURING METHODS THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/380956
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16651
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380956
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/380956 | Reflective mask blank for EUV lithography, mask blank for EUV lithography, and manufacturing methods thereof | Oct 16, 2023 | Issued |
Array
(
[id] => 19500482
[patent_doc_number] => 20240339500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/487022
[patent_app_country] => US
[patent_app_date] => 2023-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12007
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18487022
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/487022 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Oct 12, 2023 | Pending |
Array
(
[id] => 19758102
[patent_doc_number] => 20250046667
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => Heat Dissipating Structure and Methods of Forming The Same
[patent_app_type] => utility
[patent_app_number] => 18/482217
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6994
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482217
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482217 | Heat Dissipating Structure and Methods of Forming The Same | Oct 5, 2023 | Pending |
Array
(
[id] => 19252847
[patent_doc_number] => 20240203844
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/482235
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20729
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 505
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482235
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482235 | SEMICONDUCTOR DEVICE | Oct 5, 2023 | Pending |
Array
(
[id] => 19116664
[patent_doc_number] => 20240128414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-18
[patent_title] => LIGHT-EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/482331
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3892
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482331
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482331 | LIGHT-EMITTING DEVICE | Oct 5, 2023 | Pending |
Array
(
[id] => 18943795
[patent_doc_number] => 20240038934
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/482281
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8719
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482281
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482281 | DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME | Oct 5, 2023 | Pending |
Array
(
[id] => 18943403
[patent_doc_number] => 20240038542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => Integrated Structures, Capacitors and Methods of Forming Capacitors
[patent_app_type] => utility
[patent_app_number] => 18/482508
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5736
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482508
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482508 | Integrated structures, capacitors and methods of forming capacitors | Oct 5, 2023 | Issued |
Array
(
[id] => 19893348
[patent_doc_number] => 20250118660
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => ELECTRONIC FUSE VIA AND LOGIC DEVICE CO-INTEGRATION WITH BACKSIDE POWER DELIVERY NETWORK
[patent_app_type] => utility
[patent_app_number] => 18/482213
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6075
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482213
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482213 | ELECTRONIC FUSE VIA AND LOGIC DEVICE CO-INTEGRATION WITH BACKSIDE POWER DELIVERY NETWORK | Oct 5, 2023 | Pending |
Array
(
[id] => 19161351
[patent_doc_number] => 20240154058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => Light emitting device and apparatus having the same
[patent_app_type] => utility
[patent_app_number] => 18/482382
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13406
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482382
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482382 | Light emitting device and apparatus having the same | Oct 5, 2023 | Pending |
Array
(
[id] => 19893257
[patent_doc_number] => 20250118569
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => HARD MASK LAYER AND FORMATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/481976
[patent_app_country] => US
[patent_app_date] => 2023-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12634
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481976
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/481976 | HARD MASK LAYER AND FORMATION METHOD THEREOF | Oct 4, 2023 | Pending |
Array
(
[id] => 19221580
[patent_doc_number] => 20240186284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-06
[patent_title] => DBI TO SI BONDING FOR SIMPLIFIED HANDLE WAFER
[patent_app_type] => utility
[patent_app_number] => 18/464982
[patent_app_country] => US
[patent_app_date] => 2023-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9568
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464982
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/464982 | DBI to Si bonding for simplified handle wafer | Sep 10, 2023 | Issued |
Array
(
[id] => 18863260
[patent_doc_number] => 20230417696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => SEMICONDUCTOR DEVICES INCLUDING CRACK SENSOR
[patent_app_type] => utility
[patent_app_number] => 18/464040
[patent_app_country] => US
[patent_app_date] => 2023-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7411
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18464040
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/464040 | Semiconductor devices including crack sensor | Sep 7, 2023 | Issued |
Array
(
[id] => 18865925
[patent_doc_number] => 20230420362
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => SEMICONDUCTOR PACKAGE HAVING SMART POWER STAGE AND E-FUSE SOLUTION
[patent_app_type] => utility
[patent_app_number] => 18/242460
[patent_app_country] => US
[patent_app_date] => 2023-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2495
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242460
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/242460 | Semiconductor package having smart power stage and E-fuse solution | Sep 4, 2023 | Issued |
Array
(
[id] => 19055074
[patent_doc_number] => 20240097043
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/456832
[patent_app_country] => US
[patent_app_date] => 2023-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11343
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456832
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/456832 | SEMICONDUCTOR DEVICE | Aug 27, 2023 | Pending |