
Osman M. Alshack
Examiner (ID: 17252, Phone: (571)272-2069 , Office: P/2112 )
| Most Active Art Unit | 2112 |
| Art Unit(s) | 2112 |
| Total Applications | 567 |
| Issued Applications | 454 |
| Pending Applications | 63 |
| Abandoned Applications | 69 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20557047
[patent_doc_number] => 20260056833
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-26
[patent_title] => ERROR CORRECTION DEVICE FOR CORRECTING 1-BIT ERROR OF TARGET DATA AND OPERATING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 19/002235
[patent_app_country] => US
[patent_app_date] => 2024-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2316
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19002235
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/002235 | ERROR CORRECTION DEVICE FOR CORRECTING 1-BIT ERROR OF TARGET DATA AND OPERATING METHOD THEREOF | Dec 25, 2024 | Pending |
Array
(
[id] => 20052162
[patent_doc_number] => 20250190384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-12
[patent_title] => SYSTEMS, METHODS, AND APPARATUS FOR DIE-TO-DIE SYSTEM WITH LANE INTERLEAVING AND ERROR CORRECTION CODING WITH RETRY
[patent_app_type] => utility
[patent_app_number] => 18/963357
[patent_app_country] => US
[patent_app_date] => 2024-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9069
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18963357
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/963357 | SYSTEMS, METHODS, AND APPARATUS FOR DIE-TO-DIE SYSTEM WITH LANE INTERLEAVING AND ERROR CORRECTION CODING WITH RETRY | Nov 26, 2024 | Pending |
Array
(
[id] => 19833557
[patent_doc_number] => 20250085343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => COMMANDED JTAG TEST ACCESS PORT OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 18/956830
[patent_app_country] => US
[patent_app_date] => 2024-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 25474
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18956830
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/956830 | COMMANDED JTAG TEST ACCESS PORT OPERATIONS | Nov 21, 2024 | Pending |
Array
(
[id] => 19834270
[patent_doc_number] => 20250086056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-13
[patent_title] => SYNDROME DECODING SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/957253
[patent_app_country] => US
[patent_app_date] => 2024-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11171
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18957253
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/957253 | SYNDROME DECODING SYSTEM | Nov 21, 2024 | Pending |
Array
(
[id] => 20513270
[patent_doc_number] => 20260037371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-05
[patent_title] => MEMORY SYSTEM, MEMORY DEVICE AND OPERATING METHODS THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/928042
[patent_app_country] => US
[patent_app_date] => 2024-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2419
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928042
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/928042 | MEMORY SYSTEM, MEMORY DEVICE AND OPERATING METHODS THEREOF | Oct 26, 2024 | Pending |
Array
(
[id] => 20029751
[patent_doc_number] => 20250167973
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-22
[patent_title] => METHOD OF IP2 CALIBRATION FOR WIRELESS TRANSCEIVER AND DEVICE FOR PERFORMING IP2 CALIBRATION
[patent_app_type] => utility
[patent_app_number] => 18/927234
[patent_app_country] => US
[patent_app_date] => 2024-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5664
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18927234
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/927234 | METHOD OF IP2 CALIBRATION FOR WIRELESS TRANSCEIVER AND DEVICE FOR PERFORMING IP2 CALIBRATION | Oct 24, 2024 | Pending |
Array
(
[id] => 19774224
[patent_doc_number] => 20250055650
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-13
[patent_title] => CODE BLOCK GROUPING AND FEEDBACK THAT SUPPORT EFFICIENT RETRANSMISSIONS
[patent_app_type] => utility
[patent_app_number] => 18/917895
[patent_app_country] => US
[patent_app_date] => 2024-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20051
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18917895
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/917895 | CODE BLOCK GROUPING AND FEEDBACK THAT SUPPORT EFFICIENT RETRANSMISSIONS | Oct 15, 2024 | Pending |
Array
(
[id] => 20641049
[patent_doc_number] => 20260099405
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-09
[patent_title] => SELECTIVE RELIABILITY UPDATE FOR ERROR DECODING
[patent_app_type] => utility
[patent_app_number] => 18/910459
[patent_app_country] => US
[patent_app_date] => 2024-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5978
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18910459
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/910459 | SELECTIVE RELIABILITY UPDATE FOR ERROR DECODING | Oct 8, 2024 | Pending |
Array
(
[id] => 19727688
[patent_doc_number] => 20250030439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => ERROR CORRECTION CODE CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE ERROR CORRECTION CODE CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/906891
[patent_app_country] => US
[patent_app_date] => 2024-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906891
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/906891 | ERROR CORRECTION CODE CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE ERROR CORRECTION CODE CIRCUIT | Oct 3, 2024 | Pending |
Array
(
[id] => 19893851
[patent_doc_number] => 20250119163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => ENCODING METHOD AND APPARATUS, DECODING METHOD AND APPARATUS, AND DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/903370
[patent_app_country] => US
[patent_app_date] => 2024-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27700
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18903370
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/903370 | ENCODING METHOD AND APPARATUS, DECODING METHOD AND APPARATUS, AND DEVICE | Sep 30, 2024 | Pending |
Array
(
[id] => 20195484
[patent_doc_number] => 20250272194
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-28
[patent_title] => DECODER SCHEME OF FLASH MEMORY CONTROLLER CAPABLE OF REDUCING READING AND WRITING FREQUENCY OF MEMORY THAT OUTPUT CODEWORD
[patent_app_type] => utility
[patent_app_number] => 18/896875
[patent_app_country] => US
[patent_app_date] => 2024-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1118
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896875
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/896875 | DECODER SCHEME OF FLASH MEMORY CONTROLLER CAPABLE OF REDUCING READING AND WRITING FREQUENCY OF MEMORY THAT OUTPUT CODEWORD | Sep 24, 2024 | Pending |
Array
(
[id] => 20010123
[patent_doc_number] => 20250148345
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => METHODS AND SYSTEMS FOR CHARACTERIZATION AND CALIBRATION OF A QUANTUM PROCESSOR
[patent_app_type] => utility
[patent_app_number] => 18/896453
[patent_app_country] => US
[patent_app_date] => 2024-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13358
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896453
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/896453 | METHODS AND SYSTEMS FOR CHARACTERIZATION AND CALIBRATION OF A QUANTUM PROCESSOR | Sep 24, 2024 | Pending |
Array
(
[id] => 20618728
[patent_doc_number] => 20260088832
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-03-26
[patent_title] => ROW WEIGHT ADJUSTMENT IN TWO-LEVEL LOW-DENSITY PARITY-CHECK (LDPC) ERROR CORRECTION
[patent_app_type] => utility
[patent_app_number] => 18/893471
[patent_app_country] => US
[patent_app_date] => 2024-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5643
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18893471
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/893471 | ROW WEIGHT ADJUSTMENT IN TWO-LEVEL LOW-DENSITY PARITY-CHECK (LDPC) ERROR CORRECTION | Sep 22, 2024 | Pending |
Array
(
[id] => 19697395
[patent_doc_number] => 20250015940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-09
[patent_title] => MANAGEMENT OF REDUNDANT LINKS
[patent_app_type] => utility
[patent_app_number] => 18/891876
[patent_app_country] => US
[patent_app_date] => 2024-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23059
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18891876
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/891876 | MANAGEMENT OF REDUNDANT LINKS | Sep 19, 2024 | Pending |
Array
(
[id] => 19689100
[patent_doc_number] => 20250007645
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => SYSTEMS AND METHODS TO GENERATE COPIES OF DATA FOR TRANSMISSION OVER MULTIPLE COMMUNICATION CHANNELS
[patent_app_type] => utility
[patent_app_number] => 18/883113
[patent_app_country] => US
[patent_app_date] => 2024-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11475
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18883113
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/883113 | SYSTEMS AND METHODS TO GENERATE COPIES OF DATA FOR TRANSMISSION OVER MULTIPLE COMMUNICATION CHANNELS | Sep 11, 2024 | Pending |
Array
(
[id] => 20351540
[patent_doc_number] => 20250348392
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-13
[patent_title] => STORAGE DEVICE INCLUDING TEST STORAGE BLOCK AND COMPUTING SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/828904
[patent_app_country] => US
[patent_app_date] => 2024-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3431
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18828904
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/828904 | STORAGE DEVICE INCLUDING TEST STORAGE BLOCK AND COMPUTING SYSTEM | Sep 8, 2024 | Pending |
Array
(
[id] => 20572092
[patent_doc_number] => 20260066020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-03-05
[patent_title] => SELECTIVE MEDIA SCANNING FOR A VIRTUAL BLOCK
[patent_app_type] => utility
[patent_app_number] => 18/820041
[patent_app_country] => US
[patent_app_date] => 2024-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5633
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18820041
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/820041 | SELECTIVE MEDIA SCANNING FOR A VIRTUAL BLOCK | Aug 28, 2024 | Pending |
Array
(
[id] => 19646272
[patent_doc_number] => 20240420792
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-19
[patent_title] => MULTIPLE THRESHOLDS FOR MANAGING FLASH MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/817926
[patent_app_country] => US
[patent_app_date] => 2024-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 35489
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18817926
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/817926 | MULTIPLE THRESHOLDS FOR MANAGING FLASH MEMORY | Aug 27, 2024 | Pending |
Array
(
[id] => 19789186
[patent_doc_number] => 20250062865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => METHOD, APPARATUS, DEVICE AND STORAGE MEDIUM FOR TRANSMITTING AUDIO
[patent_app_type] => utility
[patent_app_number] => 18/807771
[patent_app_country] => US
[patent_app_date] => 2024-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13994
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807771
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/807771 | METHOD, APPARATUS, DEVICE AND STORAGE MEDIUM FOR TRANSMITTING AUDIO | Aug 15, 2024 | Pending |
Array
(
[id] => 19992655
[patent_doc_number] => 20250130877
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => Handling Faulty Usage-Based-Disturbance Data
[patent_app_type] => utility
[patent_app_number] => 18/790795
[patent_app_country] => US
[patent_app_date] => 2024-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12884
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790795
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/790795 | Handling Faulty Usage-Based-Disturbance Data | Jul 30, 2024 | Pending |