
Otilia Gabor
Examiner (ID: 2881)
| Most Active Art Unit | 2878 |
| Art Unit(s) | 2878, 2884 |
| Total Applications | 620 |
| Issued Applications | 492 |
| Pending Applications | 59 |
| Abandoned Applications | 69 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1496424
[patent_doc_number] => 06343034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-01-29
[patent_title] => 'Electrically alterable non-volatile memory with n-bits per cell'
[patent_app_type] => B2
[patent_app_number] => 09/493140
[patent_app_country] => US
[patent_app_date] => 2000-01-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/343/06343034.pdf
[firstpage_image] =>[orig_patent_app_number] => 09493140
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/493140 | Electrically alterable non-volatile memory with n-bits per cell | Jan 27, 2000 | Issued |
Array
(
[id] => 4368222
[patent_doc_number] => 06201761
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[patent_kind] => NA
[patent_issue_date] => 2001-03-13
[patent_title] => 'Field effect transistor with controlled body bias'
[patent_app_type] => 1
[patent_app_number] => 9/491823
[patent_app_country] => US
[patent_app_date] => 2000-01-26
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[firstpage_image] =>[orig_patent_app_number] => 491823
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/491823 | Field effect transistor with controlled body bias | Jan 25, 2000 | Issued |
Array
(
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[patent_doc_number] => 06181620
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[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Semiconductor storage device'
[patent_app_type] => 1
[patent_app_number] => 9/484023
[patent_app_country] => US
[patent_app_date] => 2000-01-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/484023 | Semiconductor storage device | Jan 17, 2000 | Issued |
Array
(
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[patent_doc_number] => 06181622
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 9/482921
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[patent_app_date] => 2000-01-14
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[pdf_file] => patents/06/181/06181622.pdf
[firstpage_image] =>[orig_patent_app_number] => 482921
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/482921 | Semiconductor memory | Jan 13, 2000 | Issued |
Array
(
[id] => 4262724
[patent_doc_number] => 06222766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'EEPROM memory cell and method of fabricating the same'
[patent_app_type] => 1
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[pdf_file] => patents/06/222/06222766.pdf
[firstpage_image] =>[orig_patent_app_number] => 481915
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/481915 | EEPROM memory cell and method of fabricating the same | Jan 11, 2000 | Issued |
Array
(
[id] => 1570326
[patent_doc_number] => 06377484
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-23
[patent_title] => 'Embedded electrically programmable read only memory devices'
[patent_app_type] => B1
[patent_app_number] => 09/480915
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09480915
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/480915 | Embedded electrically programmable read only memory devices | Jan 10, 2000 | Issued |
Array
(
[id] => 4265884
[patent_doc_number] => 06208552
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-27
[patent_title] => 'Circuit and method for biasing the charging capacitor of a semiconductor memory array'
[patent_app_type] => 1
[patent_app_number] => 9/480642
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[pdf_file] => patents/06/208/06208552.pdf
[firstpage_image] =>[orig_patent_app_number] => 480642
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/480642 | Circuit and method for biasing the charging capacitor of a semiconductor memory array | Jan 10, 2000 | Issued |
Array
(
[id] => 4298564
[patent_doc_number] => 06269033
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-31
[patent_title] => 'Semiconductor memory device having redundancy unit for data line compensation'
[patent_app_type] => 1
[patent_app_number] => 9/480619
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[pdf_file] => patents/06/269/06269033.pdf
[firstpage_image] =>[orig_patent_app_number] => 480619
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/480619 | Semiconductor memory device having redundancy unit for data line compensation | Jan 9, 2000 | Issued |
Array
(
[id] => 1437678
[patent_doc_number] => 06356484
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-03-12
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => B2
[patent_app_number] => 09/480006
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[firstpage_image] =>[orig_patent_app_number] => 09480006
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Array
(
[id] => 4425571
[patent_doc_number] => 06178125
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[patent_kind] => NA
[patent_issue_date] => 2001-01-23
[patent_title] => 'Semiconductor memory device preventing repeated use of spare memory cell and repairable by cell substitution up to two times'
[patent_app_type] => 1
[patent_app_number] => 9/478335
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[pdf_file] => patents/06/178/06178125.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/478335 | Semiconductor memory device preventing repeated use of spare memory cell and repairable by cell substitution up to two times | Jan 5, 2000 | Issued |
Array
(
[id] => 4384464
[patent_doc_number] => 06288956
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-11
[patent_title] => 'Semiconductor device having test function'
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[pdf_file] => patents/06/288/06288956.pdf
[firstpage_image] =>[orig_patent_app_number] => 477717
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/477717 | Semiconductor device having test function | Jan 4, 2000 | Issued |
Array
(
[id] => 4417578
[patent_doc_number] => 06172923
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-09
[patent_title] => 'Programmable read only memory with high speed differential sensing at low operating voltage'
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Array
(
[id] => 4317790
[patent_doc_number] => 06327188
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[patent_kind] => NA
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[patent_title] => 'Synchronous random access memory'
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[patent_app_number] => 9/477560
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/477560 | Synchronous random access memory | Jan 3, 2000 | Issued |
Array
(
[id] => 4420185
[patent_doc_number] => 06229755
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[patent_kind] => NA
[patent_issue_date] => 2001-05-08
[patent_title] => 'Wordline driving apparatus in semiconductor memory devices'
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[pdf_file] => patents/06/229/06229755.pdf
[firstpage_image] =>[orig_patent_app_number] => 475019
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/475019 | Wordline driving apparatus in semiconductor memory devices | Dec 29, 1999 | Issued |
Array
(
[id] => 4309682
[patent_doc_number] => 06185132
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[patent_kind] => NA
[patent_issue_date] => 2001-02-06
[patent_title] => 'Sensing current reduction device for semiconductor memory device and method therefor'
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Array
(
[id] => 4185334
[patent_doc_number] => 06141256
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[patent_issue_date] => 2000-10-31
[patent_title] => 'Differential flash memory cell and method for programming same'
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[pdf_file] => patents/06/141/06141256.pdf
[firstpage_image] =>[orig_patent_app_number] => 470079
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/470079 | Differential flash memory cell and method for programming same | Dec 21, 1999 | Issued |
Array
(
[id] => 1437703
[patent_doc_number] => 06356497
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-12
[patent_title] => 'Graphics controller integrated circuit without memory interface'
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[firstpage_image] =>[orig_patent_app_number] => 09467942
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/467942 | Graphics controller integrated circuit without memory interface | Dec 20, 1999 | Issued |
Array
(
[id] => 4262520
[patent_doc_number] => 06222753
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Array
(
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 460644
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/460644 | Semiconductor storage device with automatic write/erase function | Dec 14, 1999 | Issued |