Search

Otilia Gabor

Examiner (ID: 2881)

Most Active Art Unit
2878
Art Unit(s)
2878, 2884
Total Applications
620
Issued Applications
492
Pending Applications
59
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4230680 [patent_doc_number] => 06041006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/261701 [patent_app_country] => US [patent_app_date] => 1999-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 16338 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041006.pdf [firstpage_image] =>[orig_patent_app_number] => 261701 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/261701
Semiconductor memory device Mar 2, 1999 Issued
Array ( [id] => 4026056 [patent_doc_number] => 05963494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Semiconductor memory having bitline precharge circuit' [patent_app_type] => 1 [patent_app_number] => 9/258788 [patent_app_country] => US [patent_app_date] => 1999-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3739 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963494.pdf [firstpage_image] =>[orig_patent_app_number] => 258788 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258788
Semiconductor memory having bitline precharge circuit Feb 28, 1999 Issued
Array ( [id] => 3961993 [patent_doc_number] => 05999439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Ferroelectric memory using ferroelectric reference cells' [patent_app_type] => 1 [patent_app_number] => 9/259761 [patent_app_country] => US [patent_app_date] => 1999-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7579 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999439.pdf [firstpage_image] =>[orig_patent_app_number] => 259761 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/259761
Ferroelectric memory using ferroelectric reference cells Feb 28, 1999 Issued
Array ( [id] => 4416934 [patent_doc_number] => 06233185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Wafer level burn-in of memory integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/257403 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4659 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233185.pdf [firstpage_image] =>[orig_patent_app_number] => 257403 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257403
Wafer level burn-in of memory integrated circuits Feb 24, 1999 Issued
Array ( [id] => 4114966 [patent_doc_number] => 06052312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Multiple-port ring buffer' [patent_app_type] => 1 [patent_app_number] => 9/252638 [patent_app_country] => US [patent_app_date] => 1999-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052312.pdf [firstpage_image] =>[orig_patent_app_number] => 252638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/252638
Multiple-port ring buffer Feb 18, 1999 Issued
Array ( [id] => 4147715 [patent_doc_number] => 06122192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Non-volatile semiconductor memory device and fabrication method thereof' [patent_app_type] => 1 [patent_app_number] => 9/250303 [patent_app_country] => US [patent_app_date] => 1999-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 9893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122192.pdf [firstpage_image] =>[orig_patent_app_number] => 250303 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/250303
Non-volatile semiconductor memory device and fabrication method thereof Feb 15, 1999 Issued
Array ( [id] => 4082364 [patent_doc_number] => 06069820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Spin dependent conduction device' [patent_app_type] => 1 [patent_app_number] => 9/247300 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 37 [patent_no_of_words] => 13217 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069820.pdf [firstpage_image] =>[orig_patent_app_number] => 247300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/247300
Spin dependent conduction device Feb 9, 1999 Issued
Array ( [id] => 3953347 [patent_doc_number] => 05973970 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Semiconductor memory device incorporating redundancy memory cells having uniform layout' [patent_app_type] => 1 [patent_app_number] => 9/246801 [patent_app_country] => US [patent_app_date] => 1999-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 5170 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973970.pdf [firstpage_image] =>[orig_patent_app_number] => 246801 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/246801
Semiconductor memory device incorporating redundancy memory cells having uniform layout Feb 8, 1999 Issued
Array ( [id] => 4231729 [patent_doc_number] => 06088291 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/147600 [patent_app_country] => US [patent_app_date] => 1999-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 48 [patent_no_of_words] => 19189 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088291.pdf [firstpage_image] =>[orig_patent_app_number] => 147600 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/147600
Semiconductor memory device Jan 28, 1999 Issued
Array ( [id] => 4095964 [patent_doc_number] => 06163494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'IC with enhanced low voltage start-up' [patent_app_type] => 1 [patent_app_number] => 9/240102 [patent_app_country] => US [patent_app_date] => 1999-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3310 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163494.pdf [firstpage_image] =>[orig_patent_app_number] => 240102 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/240102
IC with enhanced low voltage start-up Jan 28, 1999 Issued
Array ( [id] => 4012142 [patent_doc_number] => 05986942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/233701 [patent_app_country] => US [patent_app_date] => 1999-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 7164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986942.pdf [firstpage_image] =>[orig_patent_app_number] => 233701 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/233701
Semiconductor memory device Jan 18, 1999 Issued
Array ( [id] => 4187651 [patent_doc_number] => 06084796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Programmable metallization cell structure and method of making same' [patent_app_type] => 1 [patent_app_number] => 9/228727 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 10247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084796.pdf [firstpage_image] =>[orig_patent_app_number] => 228727 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/228727
Programmable metallization cell structure and method of making same Jan 11, 1999 Issued
Array ( [id] => 4152917 [patent_doc_number] => 06061274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Methods and apparatus for message transfer in computer storage system' [patent_app_type] => 1 [patent_app_number] => 9/224701 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5117 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061274.pdf [firstpage_image] =>[orig_patent_app_number] => 224701 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224701
Methods and apparatus for message transfer in computer storage system Jan 3, 1999 Issued
Array ( [id] => 4231266 [patent_doc_number] => 06088260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Dynamic random access memory cell and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/222203 [patent_app_country] => US [patent_app_date] => 1998-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4707 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088260.pdf [firstpage_image] =>[orig_patent_app_number] => 222203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/222203
Dynamic random access memory cell and method for fabricating the same Dec 28, 1998 Issued
Array ( [id] => 4152715 [patent_doc_number] => 06061263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Small outline rambus in-line memory module' [patent_app_type] => 1 [patent_app_number] => 9/221804 [patent_app_country] => US [patent_app_date] => 1998-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2651 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061263.pdf [firstpage_image] =>[orig_patent_app_number] => 221804 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221804
Small outline rambus in-line memory module Dec 28, 1998 Issued
Array ( [id] => 4159383 [patent_doc_number] => 06064595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Floating gate memory apparatus and method for selected programming thereof' [patent_app_type] => 1 [patent_app_number] => 9/220201 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7547 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/064/06064595.pdf [firstpage_image] =>[orig_patent_app_number] => 220201 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/220201
Floating gate memory apparatus and method for selected programming thereof Dec 22, 1998 Issued
Array ( [id] => 4192251 [patent_doc_number] => 06038193 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Single ended read scheme with segmented bitline of multi-port register file' [patent_app_type] => 1 [patent_app_number] => 9/221001 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1792 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038193.pdf [firstpage_image] =>[orig_patent_app_number] => 221001 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221001
Single ended read scheme with segmented bitline of multi-port register file Dec 22, 1998 Issued
Array ( [id] => 4117239 [patent_doc_number] => 06101145 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Sensing circuit and method' [patent_app_type] => 1 [patent_app_number] => 9/216703 [patent_app_country] => US [patent_app_date] => 1998-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5872 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101145.pdf [firstpage_image] =>[orig_patent_app_number] => 216703 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/216703
Sensing circuit and method Dec 20, 1998 Issued
Array ( [id] => 4368152 [patent_doc_number] => 06201755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Method and system for storing and retrieving information in a communications node' [patent_app_type] => 1 [patent_app_number] => 9/215201 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5170 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201755.pdf [firstpage_image] =>[orig_patent_app_number] => 215201 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215201
Method and system for storing and retrieving information in a communications node Dec 17, 1998 Issued
Array ( [id] => 4192205 [patent_doc_number] => 06038190 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Electrically erasable and programmable non-volatile memory protected against power supply failure' [patent_app_type] => 1 [patent_app_number] => 9/207001 [patent_app_country] => US [patent_app_date] => 1998-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 7032 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038190.pdf [firstpage_image] =>[orig_patent_app_number] => 207001 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/207001
Electrically erasable and programmable non-volatile memory protected against power supply failure Dec 6, 1998 Issued
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