
Ovidio Escalante
Examiner (ID: 12269, Phone: (571)272-7537 , Office: P/3992 )
| Most Active Art Unit | 3992 |
| Art Unit(s) | 2645, 2614, 3992 |
| Total Applications | 822 |
| Issued Applications | 588 |
| Pending Applications | 147 |
| Abandoned Applications | 105 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19907804
[patent_doc_number] => 12284834
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-22
[patent_title] => Semiconductor devices and methods of manufacturing semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 18/777737
[patent_app_country] => US
[patent_app_date] => 2024-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 4592
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777737
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/777737 | Semiconductor devices and methods of manufacturing semiconductor devices | Jul 18, 2024 | Issued |
Array
(
[id] => 20119555
[patent_doc_number] => 12369293
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-22
[patent_title] => Conductive feature formation
[patent_app_type] => utility
[patent_app_number] => 18/769958
[patent_app_country] => US
[patent_app_date] => 2024-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 45
[patent_no_of_words] => 5835
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769958
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/769958 | Conductive feature formation | Jul 10, 2024 | Issued |
Array
(
[id] => 19639694
[patent_doc_number] => 12170311
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-12-17
[patent_title] => Manufacturing method for a power MOSFET with gate-source ESD diode structure
[patent_app_type] => utility
[patent_app_number] => 18/762560
[patent_app_country] => US
[patent_app_date] => 2024-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 9130
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18762560
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/762560 | Manufacturing method for a power MOSFET with gate-source ESD diode structure | Jul 1, 2024 | Issued |
Array
(
[id] => 19515740
[patent_doc_number] => 20240347426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/753892
[patent_app_country] => US
[patent_app_date] => 2024-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6536
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18753892
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/753892 | Packaging of a semiconductor device with a plurality of leads | Jun 24, 2024 | Issued |
Array
(
[id] => 19952822
[patent_doc_number] => 12324210
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Bipolar junction transistor with gate over terminals
[patent_app_type] => utility
[patent_app_number] => 18/750063
[patent_app_country] => US
[patent_app_date] => 2024-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 42
[patent_no_of_words] => 7660
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18750063
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/750063 | Bipolar junction transistor with gate over terminals | Jun 20, 2024 | Issued |
Array
(
[id] => 19486645
[patent_doc_number] => 20240334687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => SEMICONDUCTOR DEVICE WITH PROGRAMMABLE STRUCTURE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/743453
[patent_app_country] => US
[patent_app_date] => 2024-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10140
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18743453
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/743453 | Semiconductor device with programmable structure and method for fabricating the same | Jun 13, 2024 | Issued |
Array
(
[id] => 19952896
[patent_doc_number] => 12324284
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Semiconductor nanoparticles, method of producing the semiconductor nanoparticles, and light-emitting device
[patent_app_type] => utility
[patent_app_number] => 18/735999
[patent_app_country] => US
[patent_app_date] => 2024-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 7258
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735999
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/735999 | Semiconductor nanoparticles, method of producing the semiconductor nanoparticles, and light-emitting device | Jun 5, 2024 | Issued |
Array
(
[id] => 19453034
[patent_doc_number] => 20240313164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/669507
[patent_app_country] => US
[patent_app_date] => 2024-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20938
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669507
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/669507 | DISPLAY DEVICE | May 19, 2024 | Pending |
Array
(
[id] => 19453035
[patent_doc_number] => 20240313165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/669514
[patent_app_country] => US
[patent_app_date] => 2024-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20937
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 5
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669514
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/669514 | Display device with light emitting elements on parallel electrode branches extending from separate parallel electrodes | May 19, 2024 | Issued |
Array
(
[id] => 19679478
[patent_doc_number] => 12191351
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-01-07
[patent_title] => Laterally-diffused metal-oxide-semiconductor devices with an air gap
[patent_app_type] => utility
[patent_app_number] => 18/663563
[patent_app_country] => US
[patent_app_date] => 2024-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4151
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663563
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/663563 | Laterally-diffused metal-oxide-semiconductor devices with an air gap | May 13, 2024 | Issued |
Array
(
[id] => 19407320
[patent_doc_number] => 20240290831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => FALSE COLLECTORS AND GUARD RINGS FOR SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/658333
[patent_app_country] => US
[patent_app_date] => 2024-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5982
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658333
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/658333 | FALSE COLLECTORS AND GUARD RINGS FOR SEMICONDUCTOR DEVICES | May 7, 2024 | Abandoned |
Array
(
[id] => 19407320
[patent_doc_number] => 20240290831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => FALSE COLLECTORS AND GUARD RINGS FOR SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/658333
[patent_app_country] => US
[patent_app_date] => 2024-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5982
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658333
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/658333 | FALSE COLLECTORS AND GUARD RINGS FOR SEMICONDUCTOR DEVICES | May 7, 2024 | Abandoned |
Array
(
[id] => 19842865
[patent_doc_number] => 12255268
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-18
[patent_title] => Optoelectronic semiconductor chip and method for producting an optoelectronic semiconductor chip
[patent_app_type] => utility
[patent_app_number] => 18/619924
[patent_app_country] => US
[patent_app_date] => 2024-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 8124
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619924
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/619924 | Optoelectronic semiconductor chip and method for producting an optoelectronic semiconductor chip | Mar 27, 2024 | Issued |
Array
(
[id] => 19468344
[patent_doc_number] => 20240322014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => METHOD FOR MAKING NANOSTRUCTURE TRANSISTORS WITH FLUSH SOURCE/DRAIN DOPANT BLOCKING STRUCTURES INCLUDING A SUPERLATTICE
[patent_app_type] => utility
[patent_app_number] => 18/613435
[patent_app_country] => US
[patent_app_date] => 2024-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5031
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613435
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/613435 | Method for making nanostructure transistors with flush source/drain dopant blocking structures including a superlattice | Mar 21, 2024 | Issued |
Array
(
[id] => 19741343
[patent_doc_number] => 12218191
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-02-04
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 18/603854
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 12710
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18603854
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/603854 | Semiconductor structure and manufacturing method thereof | Mar 12, 2024 | Issued |
Array
(
[id] => 19888337
[patent_doc_number] => 12274086
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-08
[patent_title] => Fabrication method for JFET with implant isolation
[patent_app_type] => utility
[patent_app_number] => 18/600234
[patent_app_country] => US
[patent_app_date] => 2024-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 38
[patent_no_of_words] => 10235
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600234
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/600234 | Fabrication method for JFET with implant isolation | Mar 7, 2024 | Issued |
Array
(
[id] => 20113315
[patent_doc_number] => 12364071
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-15
[patent_title] => Light emitting device including multiple photoluminescence materials
[patent_app_type] => utility
[patent_app_number] => 18/435530
[patent_app_country] => US
[patent_app_date] => 2024-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 3741
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18435530
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/435530 | Light emitting device including multiple photoluminescence materials | Feb 6, 2024 | Issued |
Array
(
[id] => 19582689
[patent_doc_number] => 12148819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => System and method for bi-directional trench power switches
[patent_app_type] => utility
[patent_app_number] => 18/539959
[patent_app_country] => US
[patent_app_date] => 2023-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8399
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18539959
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/539959 | System and method for bi-directional trench power switches | Dec 13, 2023 | Issued |
Array
(
[id] => 19071178
[patent_doc_number] => 20240105604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-28
[patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/526208
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15134
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526208
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526208 | Three-dimensional semiconductor device | Nov 30, 2023 | Issued |
Array
(
[id] => 19842800
[patent_doc_number] => 12255201
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-18
[patent_title] => ESD structure
[patent_app_type] => utility
[patent_app_number] => 18/520998
[patent_app_country] => US
[patent_app_date] => 2023-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7264
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520998
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/520998 | ESD structure | Nov 27, 2023 | Issued |