Search

Pablo S. Huerta

Examiner (ID: 10228)

Most Active Art Unit
2827
Art Unit(s)
2827, 4177
Total Applications
276
Issued Applications
252
Pending Applications
0
Abandoned Applications
25

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8341562 [patent_doc_number] => 08243491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Semiconductor integrated circuit including semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/884378 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9765 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12884378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884378
Semiconductor integrated circuit including semiconductor memory Sep 16, 2010 Issued
Array ( [id] => 8245945 [patent_doc_number] => 08203877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Non-volatile semiconductor memory device capable of preventing over-programming' [patent_app_type] => utility [patent_app_number] => 12/884594 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5568 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203877.pdf [firstpage_image] =>[orig_patent_app_number] => 12884594 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884594
Non-volatile semiconductor memory device capable of preventing over-programming Sep 16, 2010 Issued
Array ( [id] => 8665977 [patent_doc_number] => 08379445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor storage device capable of reducing erasure time' [patent_app_type] => utility [patent_app_number] => 12/884400 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 10555 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12884400 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884400
Semiconductor storage device capable of reducing erasure time Sep 16, 2010 Issued
Array ( [id] => 8341567 [patent_doc_number] => 08243498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/884452 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 9364 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12884452 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884452
Semiconductor integrated circuit Sep 16, 2010 Issued
Array ( [id] => 5974521 [patent_doc_number] => 20110069563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'VOLTAGE SHIFTER FOR HIGH VOLTAGE OPERATIONS' [patent_app_type] => utility [patent_app_number] => 12/884380 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4524 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20110069563.pdf [firstpage_image] =>[orig_patent_app_number] => 12884380 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884380
Voltage shifter for high voltage operations Sep 16, 2010 Issued
Array ( [id] => 6078178 [patent_doc_number] => 20110141817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/884658 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12257 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20110141817.pdf [firstpage_image] =>[orig_patent_app_number] => 12884658 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884658
Semiconductor memory device and method for controlling the same Sep 16, 2010 Issued
Array ( [id] => 8665976 [patent_doc_number] => 08379444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor memory device capable of accurate reading even when erasure level changes' [patent_app_type] => utility [patent_app_number] => 12/883472 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 9010 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12883472 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883472
Semiconductor memory device capable of accurate reading even when erasure level changes Sep 15, 2010 Issued
Array ( [id] => 5957738 [patent_doc_number] => 20110182125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND METHOD OF DATA ERASE IN THE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/883474 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 9918 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20110182125.pdf [firstpage_image] =>[orig_patent_app_number] => 12883474 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883474
SEMICONDUCTOR MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND METHOD OF DATA ERASE IN THE SEMICONDUCTOR MEMORY DEVICE Sep 15, 2010 Abandoned
Array ( [id] => 5974510 [patent_doc_number] => 20110069557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/883520 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17689 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20110069557.pdf [firstpage_image] =>[orig_patent_app_number] => 12883520 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883520
Non-volatile semiconductor storage device Sep 15, 2010 Issued
Array ( [id] => 5974539 [patent_doc_number] => 20110069573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/883976 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13899 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20110069573.pdf [firstpage_image] =>[orig_patent_app_number] => 12883976 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883976
Semiconductor memory device Sep 15, 2010 Issued
Array ( [id] => 8714710 [patent_doc_number] => 08400855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/860058 [patent_app_country] => US [patent_app_date] => 2010-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7643 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12860058 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/860058
Semiconductor device Aug 19, 2010 Issued
Array ( [id] => 6069255 [patent_doc_number] => 20110044104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND SYSTEM, AND METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/859860 [patent_app_country] => US [patent_app_date] => 2010-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20110044104.pdf [firstpage_image] =>[orig_patent_app_number] => 12859860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/859860
Nonvolatile memory device and system, and method of programming a nonvolatile memory device Aug 19, 2010 Issued
Array ( [id] => 8677001 [patent_doc_number] => 08385123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Programming to mitigate memory cell performance differences' [patent_app_type] => utility [patent_app_number] => 12/858682 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3323 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12858682 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858682
Programming to mitigate memory cell performance differences Aug 17, 2010 Issued
Array ( [id] => 6233470 [patent_doc_number] => 20100265778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/759762 [patent_app_country] => US [patent_app_date] => 2010-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7650 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265778.pdf [firstpage_image] =>[orig_patent_app_number] => 12759762 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759762
Semiconductor memory device Apr 13, 2010 Issued
Array ( [id] => 8471275 [patent_doc_number] => 08300464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Method and circuit for calibrating data capture in a memory controller' [patent_app_type] => utility [patent_app_number] => 12/759306 [patent_app_country] => US [patent_app_date] => 2010-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12759306 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759306
Method and circuit for calibrating data capture in a memory controller Apr 12, 2010 Issued
Array ( [id] => 8877305 [patent_doc_number] => 08472278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Circuits, systems and methods for adjusting clock signals based on measured performance characteristics' [patent_app_type] => utility [patent_app_number] => 12/757336 [patent_app_country] => US [patent_app_date] => 2010-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 11546 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12757336 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/757336
Circuits, systems and methods for adjusting clock signals based on measured performance characteristics Apr 8, 2010 Issued
Array ( [id] => 7482737 [patent_doc_number] => 20110249503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-13 [patent_title] => 'SELECT GATE PROGRAMMING IN A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/756366 [patent_app_country] => US [patent_app_date] => 2010-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5250 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20110249503.pdf [firstpage_image] =>[orig_patent_app_number] => 12756366 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/756366
Select gate programming in a memory device Apr 7, 2010 Issued
Array ( [id] => 6444868 [patent_doc_number] => 20100188898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/756584 [patent_app_country] => US [patent_app_date] => 2010-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4597 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20100188898.pdf [firstpage_image] =>[orig_patent_app_number] => 12756584 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/756584
Reducing effects of program disturb in a memory device Apr 7, 2010 Issued
Array ( [id] => 7508761 [patent_doc_number] => 20110255359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'Sense-Amplification With Offset Cancellation For Static Random Access Memories' [patent_app_type] => utility [patent_app_number] => 12/757033 [patent_app_country] => US [patent_app_date] => 2010-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3421 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20110255359.pdf [firstpage_image] =>[orig_patent_app_number] => 12757033 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/757033
Sense-amplification with offset cancellation for static random access memories Apr 7, 2010 Issued
Array ( [id] => 7482712 [patent_doc_number] => 20110249490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-13 [patent_title] => 'Asymmetric Write Scheme for Magnetic Bit Cell Elements' [patent_app_type] => utility [patent_app_number] => 12/755978 [patent_app_country] => US [patent_app_date] => 2010-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9185 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20110249490.pdf [firstpage_image] =>[orig_patent_app_number] => 12755978 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/755978
Asymmetric write scheme for magnetic bit cell elements Apr 6, 2010 Issued
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