Search

Padma Haliyur

Examiner (ID: 5136, Phone: (571)272-3287 , Office: P/2663 )

Most Active Art Unit
2698
Art Unit(s)
2698, 2639, 2663
Total Applications
763
Issued Applications
605
Pending Applications
67
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17390266 [patent_doc_number] => 20220038118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => Decoding Method and Device for Turbo product codes, decoder and computer storage medium [patent_app_type] => utility [patent_app_number] => 17/275730 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17275730 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/275730
Decoding method and device for turbo product codes, decoder and computer storage medium Sep 11, 2019 Issued
Array ( [id] => 16737686 [patent_doc_number] => 10963338 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-30 [patent_title] => System and method for decoder assisted dynamic log-likelihood ratio (LLR) estimation for NAND flash memories [patent_app_type] => utility [patent_app_number] => 16/569619 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569619
System and method for decoder assisted dynamic log-likelihood ratio (LLR) estimation for NAND flash memories Sep 11, 2019 Issued
Array ( [id] => 16802007 [patent_doc_number] => 10996951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Plausibility-driven fault detection in string termination logic for fast exact substring match [patent_app_type] => utility [patent_app_number] => 16/567356 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567356 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567356
Plausibility-driven fault detection in string termination logic for fast exact substring match Sep 10, 2019 Issued
Array ( [id] => 16746242 [patent_doc_number] => 10971242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Sequential error capture during memory test [patent_app_type] => utility [patent_app_number] => 16/567508 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3521 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567508 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/567508
Sequential error capture during memory test Sep 10, 2019 Issued
Array ( [id] => 16691859 [patent_doc_number] => 20210074338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => DEFECTIVE BIT LINE MANAGEMENT IN CONNECTION WITH A MEMORY ACCESS [patent_app_type] => utility [patent_app_number] => 16/562745 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562745 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562745
Defective bit line management in connection with a memory access Sep 5, 2019 Issued
Array ( [id] => 17209502 [patent_doc_number] => 11169875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Nonvolatile semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/561399 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 21128 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16561399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/561399
Nonvolatile semiconductor memory device Sep 4, 2019 Issued
Array ( [id] => 15301511 [patent_doc_number] => 20190393891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => LOW DENSITY PARITY CHECK ENCODER HAVING LENGTH OF 16200 AND CODE RATE OF 3/15, AND LOW DENSITY PARITY CHECK ENCODING METHOD USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/559329 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559329 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/559329
Low density parity check encoder having length of 16200 and code rate of 3/15, and low density parity check encoding method using the same Sep 2, 2019 Issued
Array ( [id] => 16767281 [patent_doc_number] => 10979073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Low density parity check encoder having length of 64800 and code rate of 7/15, and low density parity check encoding method using the same [patent_app_type] => utility [patent_app_number] => 16/543349 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7061 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 1007 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543349
Low density parity check encoder having length of 64800 and code rate of 7/15, and low density parity check encoding method using the same Aug 15, 2019 Issued
Array ( [id] => 15219831 [patent_doc_number] => 20190372602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 7/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 16/542035 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542035
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 7/15 and quadrature phase shift keying, and bit interleaving method using same Aug 14, 2019 Issued
Array ( [id] => 17530590 [patent_doc_number] => 11303299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Transmitting apparatus and interleaving method thereof [patent_app_type] => utility [patent_app_number] => 16/541890 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 45991 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16541890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/541890
Transmitting apparatus and interleaving method thereof Aug 14, 2019 Issued
Array ( [id] => 15966953 [patent_doc_number] => 20200167228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => METHOD FOR RECOVERING EEPROM OF SLAVE DEVICE BY PLC COMMUNICATION MODULE [patent_app_type] => utility [patent_app_number] => 16/539624 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539624 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539624
Method for recovering EEPROM of slave device by PLC communication module Aug 12, 2019 Issued
Array ( [id] => 16744449 [patent_doc_number] => 10969429 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-06 [patent_title] => System and method for debugging in concurrent fault simulation [patent_app_type] => utility [patent_app_number] => 16/538920 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/538920
System and method for debugging in concurrent fault simulation Aug 12, 2019 Issued
Array ( [id] => 15903041 [patent_doc_number] => 20200151040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => STORAGE DEVICE THAT USES A HOST MEMORY BUFFER AND A MEMORY MANAGEMENT METHOD INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/539729 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539729 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539729
Storage device that uses a host memory buffer and a memory management method including the same Aug 12, 2019 Issued
Array ( [id] => 16944792 [patent_doc_number] => 11057051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Fractally enhanced kernel polar coding [patent_app_type] => utility [patent_app_number] => 16/538451 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12198 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16538451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/538451
Fractally enhanced kernel polar coding Aug 11, 2019 Issued
Array ( [id] => 15155711 [patent_doc_number] => 20190356333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Method And Apparatus For Processing Information, Communications Device, And Communications System [patent_app_type] => utility [patent_app_number] => 16/529438 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13529 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529438 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529438
Method and apparatus for processing information, communications device, and communications system Jul 31, 2019 Issued
Array ( [id] => 15155729 [patent_doc_number] => 20190356342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Information Transmission Method, And Decoding Method And Apparatus [patent_app_type] => utility [patent_app_number] => 16/529514 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 210869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -36 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529514
Information transmission method, and decoding method and apparatus Jul 31, 2019 Issued
Array ( [id] => 16615806 [patent_doc_number] => 20210034459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => METHOD AND SYSTEM FOR A PROACTIVE HEALTH CHECK AND RECONSTRUCTION OF DATA [patent_app_type] => utility [patent_app_number] => 16/528602 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528602 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528602
Method and system for a proactive health check and reconstruction of data Jul 30, 2019 Issued
Array ( [id] => 15155715 [patent_doc_number] => 20190356335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => Encoding Method, Communication Method, and Apparatus [patent_app_type] => utility [patent_app_number] => 16/527626 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527626 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527626
Encoding method, communication method, and apparatus Jul 30, 2019 Issued
Array ( [id] => 15155721 [patent_doc_number] => 20190356338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME [patent_app_type] => utility [patent_app_number] => 16/527485 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527485 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527485
Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 2/15 and quadrature phase shift keying, and bit interleaving method using same Jul 30, 2019 Issued
Array ( [id] => 16552839 [patent_doc_number] => 10886004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Sorting non-volatile memories [patent_app_type] => utility [patent_app_number] => 16/520836 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3860 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520836
Sorting non-volatile memories Jul 23, 2019 Issued
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