
Pamela E. Perkins
Examiner (ID: 8226, Phone: (571)272-1840 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822 |
| Total Applications | 888 |
| Issued Applications | 738 |
| Pending Applications | 17 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9184407
[patent_doc_number] => 08624345
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Photomask and photomask substrate with reduced light scattering properties'
[patent_app_type] => utility
[patent_app_number] => 13/486995
[patent_app_country] => US
[patent_app_date] => 2012-06-01
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486995
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/486995 | Photomask and photomask substrate with reduced light scattering properties | May 31, 2012 | Issued |
Array
(
[id] => 8950708
[patent_doc_number] => 20130196489
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-01
[patent_title] => 'METHOD FOR MANUFACTURING DEEP-TRENCH SUPER PN JUNCTIONS'
[patent_app_type] => utility
[patent_app_number] => 13/878453
[patent_app_country] => US
[patent_app_date] => 2012-05-31
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/878453 | Method for manufacturing deep-trench super PN junctions | May 30, 2012 | Issued |
Array
(
[id] => 8390875
[patent_doc_number] => 20120228720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-13
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES HAVING DIFFERENT THICKNESS SILICON-GERMANIUM LAYERS'
[patent_app_type] => utility
[patent_app_number] => 13/476121
[patent_app_country] => US
[patent_app_date] => 2012-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476121
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/476121 | Semiconductor integrated circuit devices having different thickness silicon-germanium layers | May 20, 2012 | Issued |
Array
(
[id] => 9318900
[patent_doc_number] => 20140051238
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-20
[patent_title] => 'METHOD FOR PRODUCING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/112216
[patent_app_country] => US
[patent_app_date] => 2012-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/112216 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE | May 1, 2012 | Abandoned |
Array
(
[id] => 9324014
[patent_doc_number] => 08659040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-25
[patent_title] => 'Semiconductor light-emitting device and process for production thereof'
[patent_app_type] => utility
[patent_app_number] => 13/439895
[patent_app_country] => US
[patent_app_date] => 2012-04-05
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13439895
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/439895 | Semiconductor light-emitting device and process for production thereof | Apr 4, 2012 | Issued |
Array
(
[id] => 8441965
[patent_doc_number] => 20120258580
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-11
[patent_title] => 'PLASMA-ASSISTED MOCVD FABRICATION OF P-TYPE GROUP III-NITRIDE MATERIALS'
[patent_app_type] => utility
[patent_app_number] => 13/413009
[patent_app_country] => US
[patent_app_date] => 2012-03-06
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13413009
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/413009 | PLASMA-ASSISTED MOCVD FABRICATION OF P-TYPE GROUP III-NITRIDE MATERIALS | Mar 5, 2012 | Abandoned |
Array
(
[id] => 9703711
[patent_doc_number] => 08828772
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'High aspect ratio MEMS devices and methods for forming the same'
[patent_app_type] => utility
[patent_app_number] => 13/412257
[patent_app_country] => US
[patent_app_date] => 2012-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13412257
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/412257 | High aspect ratio MEMS devices and methods for forming the same | Mar 4, 2012 | Issued |
Array
(
[id] => 8393719
[patent_doc_number] => 20120231565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-13
[patent_title] => 'PROCESS FOR PRODUCING A SUBSTRATE FOR A LIQUID EJECTION HEAD'
[patent_app_type] => utility
[patent_app_number] => 13/411896
[patent_app_country] => US
[patent_app_date] => 2012-03-05
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13411896
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/411896 | Process for producing a substrate for a liquid ejection head | Mar 4, 2012 | Issued |
Array
(
[id] => 9016025
[patent_doc_number] => 20130230989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-05
[patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/411703
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/411703 | Method for fabricating semiconductor device | Mar 4, 2012 | Issued |
Array
(
[id] => 8417155
[patent_doc_number] => 20120244655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-27
[patent_title] => 'BACKGRIND PROCESS FOR INTEGRATED CIRCUIT WAFERS'
[patent_app_type] => utility
[patent_app_number] => 13/412562
[patent_app_country] => US
[patent_app_date] => 2012-03-05
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/412562 | Backgrind process for integrated circuit wafers | Mar 4, 2012 | Issued |
Array
(
[id] => 9184225
[patent_doc_number] => 08624159
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Method of fabricating light emitting diode using laser lift-off technique and laser lift-off apparatus having heater'
[patent_app_type] => utility
[patent_app_number] => 13/410884
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13410884
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410884 | Method of fabricating light emitting diode using laser lift-off technique and laser lift-off apparatus having heater | Mar 1, 2012 | Issued |
Array
(
[id] => 8516311
[patent_doc_number] => 20120315719
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[patent_issue_date] => 2012-12-13
[patent_title] => 'METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR LIGHT EMMITING DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410773 | Method of manufacturing nitride semiconductor light emitting device | Mar 1, 2012 | Issued |
Array
(
[id] => 9016002
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[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-05
[patent_title] => 'PROCESSING METHOD FOR BUMP-INCLUDED DEVICE WAFER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/410794 | Processing method for bump-included device wafer | Mar 1, 2012 | Issued |
Array
(
[id] => 9074277
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[patent_title] => 'Method of manufacturing a semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/409234 | Method of manufacturing a semiconductor device | Feb 29, 2012 | Issued |
Array
(
[id] => 9086219
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Array
(
[id] => 9016016
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[patent_title] => 'PHOTORESIST STRUCTURES HAVING RESISTANCE TO PEELING'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/409863 | Method of patterning a semiconductor device | Feb 29, 2012 | Issued |
Array
(
[id] => 9503362
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[patent_title] => 'Method of manufacturing semiconductor light emitting device and mask for application of paste used therefor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/409641 | Method of manufacturing semiconductor light emitting device and mask for application of paste used therefor | Feb 29, 2012 | Issued |
Array
(
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[patent_title] => 'Method of cutting light emitting element packages employing ceramic substrate, and method of cutting multilayered object'
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Array
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[patent_title] => 'METHOD FOR MAKING GATE-OXIDE WITH STEP-GRADED THICKNESS IN TRENCHED DMOS DEVICE FOR REDUCED GATE-TO-DRAIN CAPACITANCE'
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Array
(
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[patent_title] => 'SOLAR CELL MADE IN A SINGLE PROCESSING CHAMBER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/406838 | Solar cell made in a single processing chamber | Feb 27, 2012 | Issued |