Search

Pamela E. Perkins

Examiner (ID: 12468, Phone: (571)272-1840 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
888
Issued Applications
738
Pending Applications
17
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7750448 [patent_doc_number] => 20120025295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/267495 [patent_app_country] => US [patent_app_date] => 2011-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7243 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025295.pdf [firstpage_image] =>[orig_patent_app_number] => 13267495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/267495
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 5, 2011 Abandoned
Array ( [id] => 7815187 [patent_doc_number] => 20120061807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'PITCH MULTIPLIED MASK PATTERNS FOR ISOLATED FEATURES' [patent_app_type] => utility [patent_app_number] => 13/235722 [patent_app_country] => US [patent_app_date] => 2011-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 9002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061807.pdf [firstpage_image] =>[orig_patent_app_number] => 13235722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/235722
Pitch multiplied mask patterns for isolated features Sep 18, 2011 Issued
Array ( [id] => 9608158 [patent_doc_number] => 08785325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/233379 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 34 [patent_no_of_words] => 5403 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233379 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233379
Method of manufacturing semiconductor device Sep 14, 2011 Issued
Array ( [id] => 8270753 [patent_doc_number] => 08212253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Shallow junction formation and high dopant activation rate of MOS devices' [patent_app_type] => utility [patent_app_number] => 13/228182 [patent_app_country] => US [patent_app_date] => 2011-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13228182 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/228182
Shallow junction formation and high dopant activation rate of MOS devices Sep 7, 2011 Issued
Array ( [id] => 8695982 [patent_doc_number] => 20130057991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'SILICON CONTROLLED RECTIFIER STRUCTURE WITH IMPROVED JUNCTION BREAKDOWN AND LEAKAGE CONTROL' [patent_app_type] => utility [patent_app_number] => 13/226838 [patent_app_country] => US [patent_app_date] => 2011-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7486 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226838 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226838
Silicon controlled rectifier structure with improved junction breakdown and leakage control Sep 6, 2011 Issued
Array ( [id] => 8629757 [patent_doc_number] => 08361829 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-29 [patent_title] => 'On-chip radiation dosimeter' [patent_app_type] => utility [patent_app_number] => 13/222790 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5145 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13222790 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/222790
On-chip radiation dosimeter Aug 30, 2011 Issued
Array ( [id] => 8680911 [patent_doc_number] => 20130049195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'Three-Dimensional Integrated Circuit (3DIC) Formation Process' [patent_app_type] => utility [patent_app_number] => 13/215959 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2409 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13215959 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215959
Three-dimensional integrated circuit (3DIC) formation process Aug 22, 2011 Issued
Array ( [id] => 9530027 [patent_doc_number] => 08753899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Magnetoresistive random access memory (MRAM) device and fabrication methods thereof' [patent_app_type] => utility [patent_app_number] => 13/215389 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13215389 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/215389
Magnetoresistive random access memory (MRAM) device and fabrication methods thereof Aug 22, 2011 Issued
Array ( [id] => 7651432 [patent_doc_number] => 20110300701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'APPARATUS HAVING A DIELECTRIC CONTAINING SCANDIUM AND GADOLINIUM' [patent_app_type] => utility [patent_app_number] => 13/213911 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9205 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20110300701.pdf [firstpage_image] =>[orig_patent_app_number] => 13213911 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/213911
Apparatus having a dielectric containing scandium and gadolinium Aug 18, 2011 Issued
Array ( [id] => 9482922 [patent_doc_number] => 08728872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Manufacturing process and heat dissipating device for forming interface for electronic component' [patent_app_type] => utility [patent_app_number] => 13/212494 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 6213 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212494 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212494
Manufacturing process and heat dissipating device for forming interface for electronic component Aug 17, 2011 Issued
Array ( [id] => 8932471 [patent_doc_number] => 08492169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Magnetic tunnel junction for MRAM applications' [patent_app_type] => utility [patent_app_number] => 13/136929 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 6931 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13136929 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/136929
Magnetic tunnel junction for MRAM applications Aug 14, 2011 Issued
Array ( [id] => 8802798 [patent_doc_number] => 08441073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Semiconductor device and manufacturing method for the same' [patent_app_type] => utility [patent_app_number] => 13/137381 [patent_app_country] => US [patent_app_date] => 2011-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 10164 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13137381 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137381
Semiconductor device and manufacturing method for the same Aug 9, 2011 Issued
Array ( [id] => 8657131 [patent_doc_number] => 20130037960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'METHODS OF FORMING BONDED SEMICONDUCTOR STRUCTURES IN 3D INTEGRATION PROCESSES USING RECOVERABLE SUBSTRATES, AND BONDED SEMICONDUCTOR STRUCTURES FORMED BY SUCH METHODS' [patent_app_type] => utility [patent_app_number] => 13/206280 [patent_app_country] => US [patent_app_date] => 2011-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8581 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13206280 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/206280
Methods of forming bonded semiconductor structures in 3D integration processes using recoverable substrates, and bonded semiconductor structures formed by such methods Aug 8, 2011 Issued
Array ( [id] => 8875722 [patent_doc_number] => 08470687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Strained semiconductor by full wafer bonding' [patent_app_type] => utility [patent_app_number] => 13/192078 [patent_app_country] => US [patent_app_date] => 2011-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 49 [patent_no_of_words] => 10387 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13192078 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/192078
Strained semiconductor by full wafer bonding Jul 26, 2011 Issued
Array ( [id] => 10831243 [patent_doc_number] => 08859411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Method for producing transistor' [patent_app_type] => utility [patent_app_number] => 13/817699 [patent_app_country] => US [patent_app_date] => 2011-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 15747 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13817699 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/817699
Method for producing transistor Jul 25, 2011 Issued
Array ( [id] => 8725443 [patent_doc_number] => 08404558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Method for making buried circumferential electrode microcavity plasma device arrays, and electrical interconnects' [patent_app_type] => utility [patent_app_number] => 13/188712 [patent_app_country] => US [patent_app_date] => 2011-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8175 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13188712 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/188712
Method for making buried circumferential electrode microcavity plasma device arrays, and electrical interconnects Jul 21, 2011 Issued
Array ( [id] => 7558975 [patent_doc_number] => 20110272806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'SEMICONDUCTOR DICE INCLUDING AT LEAST ONE BLIND HOLE, WAFERS INCLUDING SUCH SEMICONDUCTOR DICE, AND INTERMEDIATE PRODUCTS MADE WHILE FORMING AT LEAST ONE BLIND HOLE IN A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/187133 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272806.pdf [firstpage_image] =>[orig_patent_app_number] => 13187133 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/187133
Semiconductor dice including at least one blind hole, wafers including such semiconductor dice, and intermediate products made while forming at least one blind hole in a substrate Jul 19, 2011 Issued
Array ( [id] => 8928022 [patent_doc_number] => 20130183782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-18 [patent_title] => 'METHOD FOR PRODUCING ORGANIC EL ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/810977 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 49927 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13810977 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/810977
Method for producing organic EL element Jul 19, 2011 Issued
Array ( [id] => 9620767 [patent_doc_number] => 08790941 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Array substrate for fringe field switching mode liquid crystal display device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/166048 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 4389 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166048 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166048
Array substrate for fringe field switching mode liquid crystal display device and method of manufacturing the same Jun 21, 2011 Issued
Array ( [id] => 7586924 [patent_doc_number] => 20110281434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'Methods of Forming Patterned Photoresist Layers Over Semiconductor Substrates' [patent_app_type] => utility [patent_app_number] => 13/163890 [patent_app_country] => US [patent_app_date] => 2011-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2983 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20110281434.pdf [firstpage_image] =>[orig_patent_app_number] => 13163890 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/163890
Methods of forming patterned photoresist layers over semiconductor substrates Jun 19, 2011 Issued
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