Search

Pamela E. Perkins

Examiner (ID: 12468, Phone: (571)272-1840 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
888
Issued Applications
738
Pending Applications
17
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 415183 [patent_doc_number] => 07279365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Method of manufacturing heat conductive substrate' [patent_app_type] => utility [patent_app_number] => 10/488547 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 41 [patent_no_of_words] => 5351 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/279/07279365.pdf [firstpage_image] =>[orig_patent_app_number] => 10488547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/488547
Method of manufacturing heat conductive substrate Mar 3, 2004 Issued
Array ( [id] => 767444 [patent_doc_number] => 07009376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'SnO2 ISFET device, manufacturing method, and methods and apparatus for use thereof' [patent_app_type] => utility [patent_app_number] => 10/788398 [patent_app_country] => US [patent_app_date] => 2004-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5261 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009376.pdf [firstpage_image] =>[orig_patent_app_number] => 10788398 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/788398
SnO2 ISFET device, manufacturing method, and methods and apparatus for use thereof Feb 29, 2004 Issued
Array ( [id] => 7234930 [patent_doc_number] => 20040157356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Grounded gate for reducing dark current in CMOS image sensors' [patent_app_type] => new [patent_app_number] => 10/771290 [patent_app_country] => US [patent_app_date] => 2004-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5314 [patent_no_of_claims] => 126 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157356.pdf [firstpage_image] =>[orig_patent_app_number] => 10771290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/771290
Gated isolation structure for imagers Feb 4, 2004 Issued
Array ( [id] => 7097892 [patent_doc_number] => 20050130351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Methods for maskless lithography' [patent_app_type] => utility [patent_app_number] => 10/766557 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 26892 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 28 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20050130351.pdf [firstpage_image] =>[orig_patent_app_number] => 10766557 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766557
Methods for maskless lithography Jan 26, 2004 Issued
Array ( [id] => 996545 [patent_doc_number] => 06913984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Method of manufacturing memory with nano dots' [patent_app_type] => utility [patent_app_number] => 10/743377 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2144 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/913/06913984.pdf [firstpage_image] =>[orig_patent_app_number] => 10743377 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/743377
Method of manufacturing memory with nano dots Dec 22, 2003 Issued
Array ( [id] => 694806 [patent_doc_number] => 07071069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-04 [patent_title] => 'Shallow amorphizing implant for gettering of deep secondary end of range defects' [patent_app_type] => utility [patent_app_number] => 10/743247 [patent_app_country] => US [patent_app_date] => 2003-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 3866 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/071/07071069.pdf [firstpage_image] =>[orig_patent_app_number] => 10743247 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/743247
Shallow amorphizing implant for gettering of deep secondary end of range defects Dec 21, 2003 Issued
Array ( [id] => 686640 [patent_doc_number] => 07078311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Substrate-embedded capacitor, production method thereof, and circuit board' [patent_app_type] => utility [patent_app_number] => 10/744197 [patent_app_country] => US [patent_app_date] => 2003-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 4181 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078311.pdf [firstpage_image] =>[orig_patent_app_number] => 10744197 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/744197
Substrate-embedded capacitor, production method thereof, and circuit board Dec 21, 2003 Issued
Array ( [id] => 7673276 [patent_doc_number] => 20040180503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/742397 [patent_app_country] => US [patent_app_date] => 2003-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2800 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20040180503.pdf [firstpage_image] =>[orig_patent_app_number] => 10742397 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/742397
Method for manufacturing semiconductor device Dec 21, 2003 Issued
Array ( [id] => 672091 [patent_doc_number] => 07091102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Methods of forming integrated circuit devices having a capacitor with a hydrogen barrier spacer on a sidewall thereof and integrated circuit devices formed thereby' [patent_app_type] => utility [patent_app_number] => 10/742727 [patent_app_country] => US [patent_app_date] => 2003-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 5835 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091102.pdf [firstpage_image] =>[orig_patent_app_number] => 10742727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/742727
Methods of forming integrated circuit devices having a capacitor with a hydrogen barrier spacer on a sidewall thereof and integrated circuit devices formed thereby Dec 18, 2003 Issued
Array ( [id] => 7328932 [patent_doc_number] => 20040129984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'SnO2 ISFET device, manufacturing method, and methods and apparatus for use thereof' [patent_app_type] => new [patent_app_number] => 10/737836 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5261 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20040129984.pdf [firstpage_image] =>[orig_patent_app_number] => 10737836 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/737836
SnO2 ISFET device, manufacturing method, and methods and apparatus for use thereof Dec 17, 2003 Issued
Array ( [id] => 7333811 [patent_doc_number] => 20040131774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Ultra-high capacitance device based on nanostructures' [patent_app_type] => new [patent_app_number] => 10/739688 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5425 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20040131774.pdf [firstpage_image] =>[orig_patent_app_number] => 10739688 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/739688
Capacitor with insulating nanostructure Dec 16, 2003 Issued
Array ( [id] => 442774 [patent_doc_number] => 07256079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Evaluation method using a TEG, a method of manufacturing a semiconductor device having a TEG, an element substrate and a panel having the TEG, a program for controlling dosage and a computer-readable recording medium recoding the program' [patent_app_type] => utility [patent_app_number] => 10/735627 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5293 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/256/07256079.pdf [firstpage_image] =>[orig_patent_app_number] => 10735627 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/735627
Evaluation method using a TEG, a method of manufacturing a semiconductor device having a TEG, an element substrate and a panel having the TEG, a program for controlling dosage and a computer-readable recording medium recoding the program Dec 15, 2003 Issued
Array ( [id] => 7673243 [patent_doc_number] => 20040180536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Method for manufature of semiconductor intergrated circuit device' [patent_app_type] => new [patent_app_number] => 10/480457 [patent_app_country] => US [patent_app_date] => 2003-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10053 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20040180536.pdf [firstpage_image] =>[orig_patent_app_number] => 10480457 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/480457
Method for manufature of semiconductor intergrated circuit device Dec 11, 2003 Abandoned
Array ( [id] => 478279 [patent_doc_number] => 07223620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-29 [patent_title] => 'Process for the production of light-emitting diode light sources with a luminescence conversion element' [patent_app_type] => utility [patent_app_number] => 10/735507 [patent_app_country] => US [patent_app_date] => 2003-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3715 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/223/07223620.pdf [firstpage_image] =>[orig_patent_app_number] => 10735507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/735507
Process for the production of light-emitting diode light sources with a luminescence conversion element Dec 10, 2003 Issued
Array ( [id] => 7415223 [patent_doc_number] => 20040159938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Semiconductor component and method for producing same' [patent_app_type] => new [patent_app_number] => 10/721787 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2094 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20040159938.pdf [firstpage_image] =>[orig_patent_app_number] => 10721787 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721787
Semiconductor component and method for producing same Nov 25, 2003 Abandoned
Array ( [id] => 7089252 [patent_doc_number] => 20050009365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method of forming fine patterns' [patent_app_type] => utility [patent_app_number] => 10/691537 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5834 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20050009365.pdf [firstpage_image] =>[orig_patent_app_number] => 10691537 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/691537
Method of forming fine patterns Oct 23, 2003 Abandoned
Array ( [id] => 7375806 [patent_doc_number] => 20040219753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/690707 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4042 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20040219753.pdf [firstpage_image] =>[orig_patent_app_number] => 10690707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690707
Method of manufacturing semiconductor device Oct 22, 2003 Abandoned
Array ( [id] => 7154507 [patent_doc_number] => 20050082651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Methods of coating and singulating wafers and chip-scale packages formed therefrom' [patent_app_type] => utility [patent_app_number] => 10/690417 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5022 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20050082651.pdf [firstpage_image] =>[orig_patent_app_number] => 10690417 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690417
Methods of coating and singulating wafers Oct 19, 2003 Issued
Array ( [id] => 946787 [patent_doc_number] => 06965121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-15 [patent_title] => 'Top gate thin-film transistor and method of producing the same' [patent_app_type] => utility [patent_app_number] => 10/685248 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2974 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965121.pdf [firstpage_image] =>[orig_patent_app_number] => 10685248 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/685248
Top gate thin-film transistor and method of producing the same Oct 13, 2003 Issued
Array ( [id] => 650877 [patent_doc_number] => 07112454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-26 [patent_title] => 'System and method for reducing shorting in memory cells' [patent_app_type] => utility [patent_app_number] => 10/684967 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4065 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/112/07112454.pdf [firstpage_image] =>[orig_patent_app_number] => 10684967 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/684967
System and method for reducing shorting in memory cells Oct 13, 2003 Issued
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