Search

Pamela E. Perkins

Examiner (ID: 757, Phone: (571)272-1840 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
888
Issued Applications
738
Pending Applications
17
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7450192 [patent_doc_number] => 20040067621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Method and apparatus for processing composite member' [patent_app_type] => new [patent_app_number] => 10/678146 [patent_app_country] => US [patent_app_date] => 2003-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 21976 [patent_no_of_claims] => 78 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20040067621.pdf [firstpage_image] =>[orig_patent_app_number] => 10678146 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/678146
Method and apparatus for processing composite member Oct 5, 2003 Issued
Array ( [id] => 7280630 [patent_doc_number] => 20040063007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Precision-of-register measuring mark and measuring method' [patent_app_type] => new [patent_app_number] => 10/668257 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2575 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20040063007.pdf [firstpage_image] =>[orig_patent_app_number] => 10668257 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668257
Precision-of-register measuring mark and measuring method Sep 23, 2003 Abandoned
Array ( [id] => 1021379 [patent_doc_number] => 06887725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Micro electron gun of quantum size effect type and flat display using such electron guns as well as methods of their manufacture' [patent_app_type] => utility [patent_app_number] => 10/667517 [patent_app_country] => US [patent_app_date] => 2003-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6819 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/887/06887725.pdf [firstpage_image] =>[orig_patent_app_number] => 10667517 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/667517
Micro electron gun of quantum size effect type and flat display using such electron guns as well as methods of their manufacture Sep 22, 2003 Issued
Array ( [id] => 359692 [patent_doc_number] => 07485571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Method of making an integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/665757 [patent_app_country] => US [patent_app_date] => 2003-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 106 [patent_no_of_words] => 27069 [patent_no_of_claims] => 198 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485571.pdf [firstpage_image] =>[orig_patent_app_number] => 10665757 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/665757
Method of making an integrated circuit Sep 18, 2003 Issued
Array ( [id] => 7455862 [patent_doc_number] => 20040119025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Boron ion delivery system' [patent_app_type] => new [patent_app_number] => 10/667277 [patent_app_country] => US [patent_app_date] => 2003-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17613 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20040119025.pdf [firstpage_image] =>[orig_patent_app_number] => 10667277 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/667277
Boron ion delivery system Sep 18, 2003 Issued
Array ( [id] => 7335477 [patent_doc_number] => 20040132256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'MOS transistor having a recessed gate electrode and fabrication method thereof' [patent_app_type] => new [patent_app_number] => 10/666507 [patent_app_country] => US [patent_app_date] => 2003-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3988 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20040132256.pdf [firstpage_image] =>[orig_patent_app_number] => 10666507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/666507
MOS transistor having a recessed gate electrode and fabrication method thereof Sep 18, 2003 Issued
Array ( [id] => 7235248 [patent_doc_number] => 20040256708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Multi-chip module with extension' [patent_app_type] => new [patent_app_number] => 10/666345 [patent_app_country] => US [patent_app_date] => 2003-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1495 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20040256708.pdf [firstpage_image] =>[orig_patent_app_number] => 10666345 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/666345
Multi-chip module with extension Sep 17, 2003 Abandoned
Array ( [id] => 7450211 [patent_doc_number] => 20040067622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Wafer with a relaxed useful layer and method of forming the wafer' [patent_app_type] => new [patent_app_number] => 10/663917 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8591 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20040067622.pdf [firstpage_image] =>[orig_patent_app_number] => 10663917 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/663917
Wafer with a relaxed useful layer and method of forming the wafer Sep 16, 2003 Issued
Array ( [id] => 7001611 [patent_doc_number] => 20050167047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-04 [patent_title] => 'METHOD OF FABRICATING RADIO FREQUENCY MICROELECTROMECHANICAL SYSTEMS (MEMS) DEVICES ON LOW-TEMPERATURE CO-FIRED CERAMIC (LTCC) SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 10/663986 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 17943 [patent_no_of_claims] => 89 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20050167047.pdf [firstpage_image] =>[orig_patent_app_number] => 10663986 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/663986
Method of fabricating radio frequency microelectromechanical systems (MEMS) devices on low-temperature co-fired ceramic (LTCC) substrates Sep 16, 2003 Issued
Array ( [id] => 1101681 [patent_doc_number] => 06815307 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Method for fabricating a deep trench capacitor' [patent_app_type] => B1 [patent_app_number] => 10/605217 [patent_app_country] => US [patent_app_date] => 2003-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2889 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815307.pdf [firstpage_image] =>[orig_patent_app_number] => 10605217 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605217
Method for fabricating a deep trench capacitor Sep 15, 2003 Issued
Array ( [id] => 1021457 [patent_doc_number] => 06887751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'MOSFET performance improvement using deformation in SOI structure' [patent_app_type] => utility [patent_app_number] => 10/605167 [patent_app_country] => US [patent_app_date] => 2003-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2158 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/887/06887751.pdf [firstpage_image] =>[orig_patent_app_number] => 10605167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605167
MOSFET performance improvement using deformation in SOI structure Sep 11, 2003 Issued
Array ( [id] => 719834 [patent_doc_number] => 07049179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-23 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/659337 [patent_app_country] => US [patent_app_date] => 2003-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 4961 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/049/07049179.pdf [firstpage_image] =>[orig_patent_app_number] => 10659337 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659337
Semiconductor device and manufacturing method thereof Sep 10, 2003 Issued
Array ( [id] => 393909 [patent_doc_number] => 07297602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-20 [patent_title] => 'Conductive metal oxide gate ferroelectric memory transistor' [patent_app_type] => utility [patent_app_number] => 10/659547 [patent_app_country] => US [patent_app_date] => 2003-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 5280 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/297/07297602.pdf [firstpage_image] =>[orig_patent_app_number] => 10659547 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/659547
Conductive metal oxide gate ferroelectric memory transistor Sep 8, 2003 Issued
Array ( [id] => 7617050 [patent_doc_number] => 06946391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-20 [patent_title] => 'Method for forming dual damascenes' [patent_app_type] => utility [patent_app_number] => 10/658707 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 3000 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/946/06946391.pdf [firstpage_image] =>[orig_patent_app_number] => 10658707 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658707
Method for forming dual damascenes Sep 7, 2003 Issued
Array ( [id] => 7213014 [patent_doc_number] => 20050054216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Methods of forming patterned photoresist layers over semiconductor substrates' [patent_app_type] => utility [patent_app_number] => 10/655997 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2891 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20050054216.pdf [firstpage_image] =>[orig_patent_app_number] => 10655997 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/655997
Methods of forming patterned photoresist layers over semiconductor substrates Sep 4, 2003 Issued
Array ( [id] => 956219 [patent_doc_number] => 06955969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Method of growing as a channel region to reduce source/drain junction capacitance' [patent_app_type] => utility [patent_app_number] => 10/654497 [patent_app_country] => US [patent_app_date] => 2003-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2176 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/955/06955969.pdf [firstpage_image] =>[orig_patent_app_number] => 10654497 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/654497
Method of growing as a channel region to reduce source/drain junction capacitance Sep 2, 2003 Issued
Array ( [id] => 7083386 [patent_doc_number] => 20050048766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'METHOD FOR FABRICATING A CONDUCTIVE PLUG IN INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 10/605007 [patent_app_country] => US [patent_app_date] => 2003-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2949 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20050048766.pdf [firstpage_image] =>[orig_patent_app_number] => 10605007 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605007
METHOD FOR FABRICATING A CONDUCTIVE PLUG IN INTEGRATED CIRCUIT Aug 30, 2003 Abandoned
Array ( [id] => 768953 [patent_doc_number] => 07005310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-28 [patent_title] => 'Manufacturing method of solid-state image sensing device' [patent_app_type] => utility [patent_app_number] => 10/651087 [patent_app_country] => US [patent_app_date] => 2003-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 12306 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/005/07005310.pdf [firstpage_image] =>[orig_patent_app_number] => 10651087 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/651087
Manufacturing method of solid-state image sensing device Aug 28, 2003 Issued
Array ( [id] => 732504 [patent_doc_number] => 07037758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Semiconductor device, method of manufacturing the same, circuit board and electronic apparatus' [patent_app_type] => utility [patent_app_number] => 10/642737 [patent_app_country] => US [patent_app_date] => 2003-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 7638 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/037/07037758.pdf [firstpage_image] =>[orig_patent_app_number] => 10642737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/642737
Semiconductor device, method of manufacturing the same, circuit board and electronic apparatus Aug 18, 2003 Issued
Array ( [id] => 7395150 [patent_doc_number] => 20040038494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Manufacturing method of semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/642658 [patent_app_country] => US [patent_app_date] => 2003-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9434 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20040038494.pdf [firstpage_image] =>[orig_patent_app_number] => 10642658 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/642658
Manufacturing method of semiconductor integrated circuit device Aug 18, 2003 Issued
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