
Pamela E. Perkins
Examiner (ID: 12468, Phone: (571)272-1840 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822 |
| Total Applications | 888 |
| Issued Applications | 738 |
| Pending Applications | 17 |
| Abandoned Applications | 134 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 759478
[patent_doc_number] => 07015593
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-21
[patent_title] => 'Semiconductor device having contact prevention spacer'
[patent_app_type] => utility
[patent_app_number] => 10/637527
[patent_app_country] => US
[patent_app_date] => 2003-08-11
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[pdf_file] => patents/07/015/07015593.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/637527 | Semiconductor device having contact prevention spacer | Aug 10, 2003 | Issued |
Array
(
[id] => 7386833
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[patent_title] => 'Contact capping local interconnect'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/632653 | Contact capping local interconnect | Aug 1, 2003 | Issued |
Array
(
[id] => 7675161
[patent_doc_number] => 20040126957
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[patent_issue_date] => 2004-07-01
[patent_title] => 'Microelectronic process and structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/631587 | Microelectronic process and structure | Jul 30, 2003 | Issued |
Array
(
[id] => 1123435
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[patent_title] => 'Method of fabricating non-volatile memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/604587 | Method of fabricating non-volatile memory | Jul 30, 2003 | Issued |
Array
(
[id] => 1005363
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[patent_title] => 'Protecting metal conductors with sacrificial organic monolayers'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/628297 | Protecting metal conductors with sacrificial organic monolayers | Jul 24, 2003 | Issued |
Array
(
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[patent_title] => 'Method for stabilizing high pressure oxidation of a semiconductor device'
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Array
(
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[patent_title] => 'Semiconductor device having self-aligned contact plug and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/625027
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[firstpage_image] =>[orig_patent_app_number] => 10625027
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/625027 | Semiconductor device having self-aligned contact plug and method for fabricating the same | Jul 21, 2003 | Issued |
Array
(
[id] => 587231
[patent_doc_number] => 07439158
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[patent_issue_date] => 2008-10-21
[patent_title] => 'Strained semiconductor by full wafer bonding'
[patent_app_type] => utility
[patent_app_number] => 10/623788
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/623788 | Strained semiconductor by full wafer bonding | Jul 20, 2003 | Issued |
Array
(
[id] => 793137
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[patent_title] => 'Moisture passivated planar index-guided VCSEL'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/620137 | Moisture passivated planar index-guided VCSEL | Jul 13, 2003 | Issued |
Array
(
[id] => 790519
[patent_doc_number] => 06984539
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Method of manufacturing light-emitting diode device'
[patent_app_type] => utility
[patent_app_number] => 10/617727
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/617727 | Method of manufacturing light-emitting diode device | Jul 13, 2003 | Issued |
Array
(
[id] => 7400365
[patent_doc_number] => 20040023430
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[patent_title] => 'Method for forming a micro-mechanical component in a semiconductor wafer, and a semiconductor wafer comprising a micro-mechanical component formed therein'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/617427 | Method for forming a micro-mechanical component in a semiconductor wafer, and a semiconductor wafer comprising a micro-mechanical component formed therein | Jul 10, 2003 | Issued |
Array
(
[id] => 990715
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[patent_title] => 'Superjunction device and process for its manufacture'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/613327 | Superjunction device and process for its manufacture | Jul 2, 2003 | Issued |
Array
(
[id] => 519214
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[patent_title] => 'Three dimensional structure integrated circuit'
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/610437 | Fabricating a die with test enable circuits between embedded cores | Jun 29, 2003 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/608347 | Method and apparatus of preventing tungsten pullout during tungsten chemical mill processing | Jun 26, 2003 | Abandoned |
Array
(
[id] => 999533
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[patent_title] => 'Hybrid planar and finFET CMOS devices'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/604097 | Hybrid planar and finFET CMOS devices | Jun 25, 2003 | Issued |
Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/600947 | Structures to mechanically stabilize isolated top-level metal lines | Jun 19, 2003 | Abandoned |