Search

Pamela E. Perkins

Examiner (ID: 12468, Phone: (571)272-1840 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
888
Issued Applications
738
Pending Applications
17
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 759478 [patent_doc_number] => 07015593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Semiconductor device having contact prevention spacer' [patent_app_type] => utility [patent_app_number] => 10/637527 [patent_app_country] => US [patent_app_date] => 2003-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5791 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/015/07015593.pdf [firstpage_image] =>[orig_patent_app_number] => 10637527 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/637527
Semiconductor device having contact prevention spacer Aug 10, 2003 Issued
Array ( [id] => 7386833 [patent_doc_number] => 20040021226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Contact capping local interconnect' [patent_app_type] => new [patent_app_number] => 10/632653 [patent_app_country] => US [patent_app_date] => 2003-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6401 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20040021226.pdf [firstpage_image] =>[orig_patent_app_number] => 10632653 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/632653
Contact capping local interconnect Aug 1, 2003 Issued
Array ( [id] => 7675161 [patent_doc_number] => 20040126957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Microelectronic process and structure' [patent_app_type] => new [patent_app_number] => 10/631587 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4266 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20040126957.pdf [firstpage_image] =>[orig_patent_app_number] => 10631587 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631587
Microelectronic process and structure Jul 30, 2003 Issued
Array ( [id] => 1123435 [patent_doc_number] => 06794280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method of fabricating non-volatile memory' [patent_app_type] => B2 [patent_app_number] => 10/604587 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3246 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794280.pdf [firstpage_image] =>[orig_patent_app_number] => 10604587 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/604587
Method of fabricating non-volatile memory Jul 30, 2003 Issued
Array ( [id] => 1005363 [patent_doc_number] => 06905958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-14 [patent_title] => 'Protecting metal conductors with sacrificial organic monolayers' [patent_app_type] => utility [patent_app_number] => 10/628297 [patent_app_country] => US [patent_app_date] => 2003-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2288 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/905/06905958.pdf [firstpage_image] =>[orig_patent_app_number] => 10628297 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628297
Protecting metal conductors with sacrificial organic monolayers Jul 24, 2003 Issued
Array ( [id] => 7443240 [patent_doc_number] => 20040185677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Method for stabilizing high pressure oxidation of a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/624817 [patent_app_country] => US [patent_app_date] => 2003-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1877 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20040185677.pdf [firstpage_image] =>[orig_patent_app_number] => 10624817 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/624817
Method for stabilizing high pressure oxidation of a semiconductor device Jul 21, 2003 Issued
Array ( [id] => 1034481 [patent_doc_number] => 06875690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Semiconductor device having self-aligned contact plug and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/625027 [patent_app_country] => US [patent_app_date] => 2003-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6014 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/875/06875690.pdf [firstpage_image] =>[orig_patent_app_number] => 10625027 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/625027
Semiconductor device having self-aligned contact plug and method for fabricating the same Jul 21, 2003 Issued
Array ( [id] => 587231 [patent_doc_number] => 07439158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Strained semiconductor by full wafer bonding' [patent_app_type] => utility [patent_app_number] => 10/623788 [patent_app_country] => US [patent_app_date] => 2003-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 49 [patent_no_of_words] => 10259 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439158.pdf [firstpage_image] =>[orig_patent_app_number] => 10623788 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/623788
Strained semiconductor by full wafer bonding Jul 20, 2003 Issued
Array ( [id] => 793137 [patent_doc_number] => 06982182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-03 [patent_title] => 'Moisture passivated planar index-guided VCSEL' [patent_app_type] => utility [patent_app_number] => 10/620137 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2935 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/982/06982182.pdf [firstpage_image] =>[orig_patent_app_number] => 10620137 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/620137
Moisture passivated planar index-guided VCSEL Jul 13, 2003 Issued
Array ( [id] => 790519 [patent_doc_number] => 06984539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Method of manufacturing light-emitting diode device' [patent_app_type] => utility [patent_app_number] => 10/617727 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4139 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/984/06984539.pdf [firstpage_image] =>[orig_patent_app_number] => 10617727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/617727
Method of manufacturing light-emitting diode device Jul 13, 2003 Issued
Array ( [id] => 7400365 [patent_doc_number] => 20040023430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Method for forming a micro-mechanical component in a semiconductor wafer, and a semiconductor wafer comprising a micro-mechanical component formed therein' [patent_app_type] => new [patent_app_number] => 10/617427 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11366 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20040023430.pdf [firstpage_image] =>[orig_patent_app_number] => 10617427 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/617427
Method for forming a micro-mechanical component in a semiconductor wafer, and a semiconductor wafer comprising a micro-mechanical component formed therein Jul 10, 2003 Issued
Array ( [id] => 990715 [patent_doc_number] => 06919241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Superjunction device and process for its manufacture' [patent_app_type] => utility [patent_app_number] => 10/613327 [patent_app_country] => US [patent_app_date] => 2003-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1499 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/919/06919241.pdf [firstpage_image] =>[orig_patent_app_number] => 10613327 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/613327
Superjunction device and process for its manufacture Jul 2, 2003 Issued
Array ( [id] => 519214 [patent_doc_number] => 07193239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Three dimensional structure integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/614067 [patent_app_country] => US [patent_app_date] => 2003-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7281 [patent_no_of_claims] => 79 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193239.pdf [firstpage_image] =>[orig_patent_app_number] => 10614067 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/614067
Three dimensional structure integrated circuit Jul 2, 2003 Issued
Array ( [id] => 7429884 [patent_doc_number] => 20040266155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Formation of small gates beyond lithographic limits' [patent_app_type] => new [patent_app_number] => 10/610047 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1458 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266155.pdf [firstpage_image] =>[orig_patent_app_number] => 10610047 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/610047
Formation of small gates beyond lithographic limits Jun 29, 2003 Abandoned
Array ( [id] => 710580 [patent_doc_number] => 07056752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Fabricating a die with test enable circuits between embedded cores' [patent_app_type] => utility [patent_app_number] => 10/610437 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 5579 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/056/07056752.pdf [firstpage_image] =>[orig_patent_app_number] => 10610437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/610437
Fabricating a die with test enable circuits between embedded cores Jun 29, 2003 Issued
Array ( [id] => 7430017 [patent_doc_number] => 20040266174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Method and apparatus of preventing tungsten pullout during tungsten chemical mill processing' [patent_app_type] => new [patent_app_number] => 10/608347 [patent_app_country] => US [patent_app_date] => 2003-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2020 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20040266174.pdf [firstpage_image] =>[orig_patent_app_number] => 10608347 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/608347
Method and apparatus of preventing tungsten pullout during tungsten chemical mill processing Jun 26, 2003 Abandoned
Array ( [id] => 999533 [patent_doc_number] => 06911383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Hybrid planar and finFET CMOS devices' [patent_app_type] => utility [patent_app_number] => 10/604097 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4714 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/911/06911383.pdf [firstpage_image] =>[orig_patent_app_number] => 10604097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/604097
Hybrid planar and finFET CMOS devices Jun 25, 2003 Issued
Array ( [id] => 7221851 [patent_doc_number] => 20040072408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Methods of forming trench isolated integrated circuit devices including grooves, and trench isolated integrated circuit devices so formed' [patent_app_type] => new [patent_app_number] => 10/601937 [patent_app_country] => US [patent_app_date] => 2003-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20040072408.pdf [firstpage_image] =>[orig_patent_app_number] => 10601937 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/601937
Methods of forming trench isolated integrated circuit devices including grooves Jun 23, 2003 Issued
Array ( [id] => 7203539 [patent_doc_number] => 20040087061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Structure and process for reducing die corner and edge stresses in microelectronic packages' [patent_app_type] => new [patent_app_number] => 10/602137 [patent_app_country] => US [patent_app_date] => 2003-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3612 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20040087061.pdf [firstpage_image] =>[orig_patent_app_number] => 10602137 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/602137
Structure and process for reducing die corner and edge stresses in microelectronic packages Jun 22, 2003 Issued
Array ( [id] => 7446175 [patent_doc_number] => 20040009657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Structures to mechanically stabilize isolated top-level metal lines' [patent_app_type] => new [patent_app_number] => 10/600947 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1595 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20040009657.pdf [firstpage_image] =>[orig_patent_app_number] => 10600947 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600947
Structures to mechanically stabilize isolated top-level metal lines Jun 19, 2003 Abandoned
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