Search

Pamela J. Burgess

Examiner (ID: 5754)

Most Active Art Unit
2911
Art Unit(s)
2911, 2901
Total Applications
2565
Issued Applications
2545
Pending Applications
0
Abandoned Applications
20

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18268518 [patent_doc_number] => 20230089760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SINGLE-LEVEL SINGLE-LINE FULL-DUPLEX BUS COMMUNICATION METHOD AND SYSTEM [patent_app_type] => utility [patent_app_number] => 17/798608 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2651 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17798608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/798608
Single-level single-line full-duplex bus communication method and system Feb 24, 2021 Issued
Array ( [id] => 17589646 [patent_doc_number] => 11327919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Systems, computer-readable media and computer-implemented methods for network adapter activation in connection with fibre channel uplink mapping [patent_app_type] => utility [patent_app_number] => 17/184676 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184676
Systems, computer-readable media and computer-implemented methods for network adapter activation in connection with fibre channel uplink mapping Feb 24, 2021 Issued
Array ( [id] => 17824340 [patent_doc_number] => 11429288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-30 [patent_title] => System and method to secure ports on a computer [patent_app_type] => utility [patent_app_number] => 17/184641 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4706 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184641
System and method to secure ports on a computer Feb 24, 2021 Issued
Array ( [id] => 18414798 [patent_doc_number] => 11669340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Syncing settings across incompatible operating systems [patent_app_type] => utility [patent_app_number] => 17/183278 [patent_app_country] => US [patent_app_date] => 2021-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 8454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/183278
Syncing settings across incompatible operating systems Feb 22, 2021 Issued
Array ( [id] => 18592127 [patent_doc_number] => 11741025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Storage system and method for providing a dual-priority credit system [patent_app_type] => utility [patent_app_number] => 17/178401 [patent_app_country] => US [patent_app_date] => 2021-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6979 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/178401
Storage system and method for providing a dual-priority credit system Feb 17, 2021 Issued
Array ( [id] => 18303432 [patent_doc_number] => 11625335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Adaptive address translation caches [patent_app_type] => utility [patent_app_number] => 17/170460 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13349 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17170460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/170460
Adaptive address translation caches Feb 7, 2021 Issued
Array ( [id] => 18796427 [patent_doc_number] => 11830243 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Bus translator [patent_app_type] => utility [patent_app_number] => 17/154671 [patent_app_country] => US [patent_app_date] => 2021-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8160 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17154671 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/154671
Bus translator Jan 20, 2021 Issued
Array ( [id] => 16810542 [patent_doc_number] => 20210133097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SIGNAL COLLECTION METHOD AND SIGNAL COLLECTION DEVICE [patent_app_type] => utility [patent_app_number] => 17/145091 [patent_app_country] => US [patent_app_date] => 2021-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145091 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145091
Signal collection method and signal collection device Jan 7, 2021 Issued
Array ( [id] => 17409050 [patent_doc_number] => 11249935 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-15 [patent_title] => Single- and multi-channel, multi-latency payload bus [patent_app_type] => utility [patent_app_number] => 17/142944 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4656 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142944
Single- and multi-channel, multi-latency payload bus Jan 5, 2021 Issued
Array ( [id] => 17613930 [patent_doc_number] => 20220156210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => PROCESSING AND STORAGE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/139004 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/139004
Processing and storage circuit Dec 30, 2020 Issued
Array ( [id] => 16851345 [patent_doc_number] => 20210152090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => STACKED BUCK CONVERTER WITH INDUCTOR SWITCHING NODE PRE-CHARGE AND CONDUCTION MODULATION CONTROL [patent_app_type] => utility [patent_app_number] => 17/132814 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132814 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132814
Stacked buck converter with inductor switching node pre-charge and conduction modulation control Dec 22, 2020 Issued
Array ( [id] => 17675089 [patent_doc_number] => 20220188256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => IDENTIFIERS FOR CONNECTIONS BETWEEN HOSTS AND STORAGE DEVICES [patent_app_type] => utility [patent_app_number] => 17/119339 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17119339 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/119339
Identifiers for connections between hosts and storage devices Dec 10, 2020 Issued
Array ( [id] => 18095702 [patent_doc_number] => 20220414043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => AVALON-TO-AXI4 BUS CONVERSION METHOD [patent_app_type] => utility [patent_app_number] => 17/780190 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17780190 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/780190
Avalon-to-Axi4 bus conversion method Dec 8, 2020 Issued
Array ( [id] => 16722149 [patent_doc_number] => 20210089296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => FIRMWARE BOOT TASK DISTRIBUTION TO ENABLE LOW LATENCY BOOT PERFORMANCE [patent_app_type] => utility [patent_app_number] => 17/113771 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14853 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113771 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113771
Firmware boot task distribution to enable low latency boot performance Dec 6, 2020 Issued
Array ( [id] => 17128734 [patent_doc_number] => 20210303503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => METHOD AND SYSTEM FOR ENHANCED SPI COMMUNICATION [patent_app_type] => utility [patent_app_number] => 17/109315 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109315
Method and system for enhanced SPI communication Dec 1, 2020 Issued
Array ( [id] => 17209575 [patent_doc_number] => 11169948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Channel allocation among low voltage drive circuits [patent_app_type] => utility [patent_app_number] => 17/093101 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 36 [patent_no_of_words] => 19531 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093101
Channel allocation among low voltage drive circuits Nov 8, 2020 Issued
Array ( [id] => 17550270 [patent_doc_number] => 20220121612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => STATIC IDENTIFIERS FOR A SYNCHRONOUS INTERFACE [patent_app_type] => utility [patent_app_number] => 17/074884 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15371 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074884
STATIC IDENTIFIERS FOR A SYNCHRONOUS INTERFACE Oct 19, 2020 Abandoned
Array ( [id] => 17817349 [patent_doc_number] => 11422963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => System and method to handle uncompressible data with a compression accelerator [patent_app_type] => utility [patent_app_number] => 17/071545 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8922 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/071545
System and method to handle uncompressible data with a compression accelerator Oct 14, 2020 Issued
Array ( [id] => 16987033 [patent_doc_number] => 11074206 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-27 [patent_title] => Message protocol for a data processing system [patent_app_type] => utility [patent_app_number] => 17/036225 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 20233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17036225 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/036225
Message protocol for a data processing system Sep 28, 2020 Issued
Array ( [id] => 18414935 [patent_doc_number] => 11669477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Method and apparatus for supporting TCM communication by BIOS of ARM server, device, and medium [patent_app_type] => utility [patent_app_number] => 17/909498 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17909498 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/909498
Method and apparatus for supporting TCM communication by BIOS of ARM server, device, and medium Sep 27, 2020 Issued
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