Pamela J. Burgess

Array ( [id] => 14571099 [patent_doc_number] => 20190213156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => SYSTEM AND METHOD FOR CONTROLLING THE PERFORMANCE OF SERIAL ATTACHED SCSI (SAS) TARGET DEVICES [patent_app_type] => utility [patent_app_number] => 16/197109 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16197109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14076957 [patent_doc_number] => 20190087366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => APPARATUSES AND METHODS FOR ASYMMETRIC INPUT/OUTPUT INTERFACE FOR A MEMORY [patent_app_type] => utility [patent_app_number] => 16/193286 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193286 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16574223 [patent_doc_number] => 10896146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Reliability-aware runtime optimal processor configuration [patent_app_type] => utility [patent_app_number] => 16/194247 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2975 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14046977 [patent_doc_number] => 20190079595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => Device Driver-Level Approach for Utilizing a Single Set of Interface Input Devices for Multiple Computing Devices [patent_app_type] => utility [patent_app_number] => 16/190775 [patent_app_country] => US [patent_app_date] => 2018-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16565882 [patent_doc_number] => 10891251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Signal connector for microwave circuits [patent_app_type] => utility [patent_app_number] => 16/186157 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14239973 [patent_doc_number] => 20190132159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => TRANSCEIVER UNIT FOR TRANSMITTING DATA VIA A DIFFERENTIAL BUS [patent_app_type] => utility [patent_app_number] => 16/170333 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15854725 [patent_doc_number] => 10642646 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-05 [patent_title] => Techniques of securely performing logic as service in BMC [patent_app_type] => utility [patent_app_number] => 16/169256 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6912 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17003707 [patent_doc_number] => 11082544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Compact timestamp, encoders and decoders that implement the same, and related devices, systems and methods [patent_app_type] => utility [patent_app_number] => 16/169501 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 16205 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13933683 [patent_doc_number] => 20190050357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => COMMUNICATION SYSTEM, COMMUNICATION SYSTEM CONTROL METHOD, AND PROGRAM [patent_app_type] => utility [patent_app_number] => 16/162767 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16162767 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15638493 [patent_doc_number] => 10592240 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-03-17 [patent_title] => Scalable random arbiter [patent_app_type] => utility [patent_app_number] => 16/159736 [patent_app_country] => US [patent_app_date] => 2018-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4873 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159736 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16307699 [patent_doc_number] => 10776493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Secure management and execution of computing code including firmware [patent_app_type] => utility [patent_app_number] => 16/159365 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7960 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13875567 [patent_doc_number] => 20190034124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => SOLID STATE DRIVE MULTI-CARD ADAPTER WITH INTEGRATED PROCESSING [patent_app_type] => utility [patent_app_number] => 16/149034 [patent_app_country] => US [patent_app_date] => 2018-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16149034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15691211 [patent_doc_number] => 20200100269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SYSTEM AND METHOD FOR ADVANCED LOW POWER WIDE AREA NETWORK COMMUNICATIONS POWER MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/141533 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14346769 [patent_doc_number] => 20190155357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => COMMUNICATION DEVICE, COMMUNICATION CONTROLLING METHOD, AND NON-TRANSITORY RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/135621 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11588 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16135621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16462753 [patent_doc_number] => 10846101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Method and system for starting up application [patent_app_type] => utility [patent_app_number] => 16/130501 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7187 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14363169 [patent_doc_number] => 10302880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Method and system for implementing high-speed electrical interfaces between semiconductor dies in optical communication systems [patent_app_type] => utility [patent_app_number] => 16/110587 [patent_app_country] => US [patent_app_date] => 2018-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5279 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16110587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14457829 [patent_doc_number] => 10324876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Orthogonal differential vector signaling codes with embedded clock [patent_app_type] => utility [patent_app_number] => 16/107839 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13738381 [patent_doc_number] => 20180373660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => Enabling arrangement for an electronic device with housing-integrated functionalities and method therefor [patent_app_type] => utility [patent_app_number] => 15/999172 [patent_app_country] => US [patent_app_date] => 2018-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15999172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15458489 [patent_doc_number] => 20200042069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => COGNITIVE BATTERY STATE OF CHARGE RECALIBRATION [patent_app_type] => utility [patent_app_number] => 16/052683 [patent_app_country] => US [patent_app_date] => 2018-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16052683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15439485 [patent_doc_number] => 20200033926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => SYSTEM AND METHOD TO MAINTAIN POWER CAP WHILE BASEBOARD MANAGEMENT CONTROLLER REBOOTS [patent_app_type] => utility [patent_app_number] => 16/047361 [patent_app_country] => US [patent_app_date] => 2018-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16047361 [rel_patent_id] =>[rel_patent_doc_number] =>)