Search

Pamela J. Burgess

Examiner (ID: 5754)

Most Active Art Unit
2911
Art Unit(s)
2911, 2901
Total Applications
2565
Issued Applications
2545
Pending Applications
0
Abandoned Applications
20

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11651621 [patent_doc_number] => 20170147522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'SYSTEMS AND METHODS FOR FLIPPING NIC TEAMING CONFIGURATION WITHOUT INTERFERING LIVE TRAFFIC' [patent_app_type] => utility [patent_app_number] => 14/950980 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4459 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14950980 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/950980
Systems and methods for flipping NIC teaming configuration without interfering live traffic Nov 23, 2015 Issued
Array ( [id] => 13254745 [patent_doc_number] => 10140063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => Solid state drive multi-card adapter with integrated processing [patent_app_type] => utility [patent_app_number] => 14/951480 [patent_app_country] => US [patent_app_date] => 2015-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 9467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14951480 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/951480
Solid state drive multi-card adapter with integrated processing Nov 23, 2015 Issued
Array ( [id] => 12513858 [patent_doc_number] => 10002085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-19 [patent_title] => Peripheral component interconnect (PCI) device and system including the PCI [patent_app_type] => utility [patent_app_number] => 14/938994 [patent_app_country] => US [patent_app_date] => 2015-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14938994 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/938994
Peripheral component interconnect (PCI) device and system including the PCI Nov 11, 2015 Issued
Array ( [id] => 10801102 [patent_doc_number] => 20160147259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/937467 [patent_app_country] => US [patent_app_date] => 2015-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4298 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14937467 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/937467
ELECTRONIC DEVICE Nov 9, 2015 Abandoned
Array ( [id] => 10801526 [patent_doc_number] => 20160147683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-26 [patent_title] => 'BUS CONTROLLER AND DATA TRANSMISSION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/936696 [patent_app_country] => US [patent_app_date] => 2015-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5555 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14936696 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/936696
Bus controller and data transmission method thereof Nov 9, 2015 Issued
Array ( [id] => 11621982 [patent_doc_number] => 20170132169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'Asynchronous Notification Including Parameter Values in Serial Advanced Technology Attachment Protocol' [patent_app_type] => utility [patent_app_number] => 14/937407 [patent_app_country] => US [patent_app_date] => 2015-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14937407 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/937407
Asynchronous notification including parameter values in serial advanced technology attachment protocol Nov 9, 2015 Issued
Array ( [id] => 14034661 [patent_doc_number] => 10229082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => System and method for providing wireless communications to a boxed server [patent_app_type] => utility [patent_app_number] => 14/936321 [patent_app_country] => US [patent_app_date] => 2015-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12822 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14936321 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/936321
System and method for providing wireless communications to a boxed server Nov 8, 2015 Issued
Array ( [id] => 10781731 [patent_doc_number] => 20160127887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'CONTROL OF DEVICE FEATURES BASED ON VEHICLE STATE' [patent_app_type] => utility [patent_app_number] => 14/930197 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12725 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930197 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930197
CONTROL OF DEVICE FEATURES BASED ON VEHICLE STATE Nov 1, 2015 Abandoned
Array ( [id] => 12167645 [patent_doc_number] => 09886414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-06 [patent_title] => 'Bus system in SoC' [patent_app_type] => utility [patent_app_number] => 14/873485 [patent_app_country] => US [patent_app_date] => 2015-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14873485 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/873485
Bus system in SoC Oct 1, 2015 Issued
Array ( [id] => 10739782 [patent_doc_number] => 20160085933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'CLINICAL COMPONENT ROUTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/859649 [patent_app_country] => US [patent_app_date] => 2015-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4228 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14859649 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/859649
Clinical component routing system Sep 20, 2015 Issued
Array ( [id] => 11614572 [patent_doc_number] => 09652429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-16 [patent_title] => 'Horizontally expandable computing system' [patent_app_type] => utility [patent_app_number] => 14/855740 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14855740 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/855740
Horizontally expandable computing system Sep 15, 2015 Issued
Array ( [id] => 10446804 [patent_doc_number] => 20150331818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'DETERMINING WHEN TO THROTTLE INTERRUPTS TO LIMIT INTERRUPT PROCESSING TO AN INTERRUPT PROCESSING TIME PERIOD' [patent_app_type] => utility [patent_app_number] => 14/813024 [patent_app_country] => US [patent_app_date] => 2015-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5888 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14813024 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/813024
Determining when to throttle interrupts to limit interrupt processing to an interrupt processing time period Jul 28, 2015 Issued
Array ( [id] => 10446810 [patent_doc_number] => 20150331824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'SEGMENTING BUS TOPOLOGY' [patent_app_type] => utility [patent_app_number] => 14/806653 [patent_app_country] => US [patent_app_date] => 2015-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4235 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14806653 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/806653
Segmenting bus topology Jul 22, 2015 Issued
Array ( [id] => 10673822 [patent_doc_number] => 20160019967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'EXTERNAL MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/802605 [patent_app_country] => US [patent_app_date] => 2015-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14802605 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/802605
EXTERNAL MEMORY DEVICE Jul 16, 2015 Abandoned
Array ( [id] => 10471022 [patent_doc_number] => 20150356039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'Device And Method To Assign Device Pin Functionality For Multi-Processor Core Devices' [patent_app_type] => utility [patent_app_number] => 14/729402 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729402 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729402
Device and method to assign device pin functionality for multi-processor core devices Jun 2, 2015 Issued
Array ( [id] => 10665502 [patent_doc_number] => 20160011647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'POWER CONTROL METHOD AND ELECTRONIC DEVICE SUPPORTING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/729527 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5668 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729527 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729527
Power control method and electronic device supporting the same Jun 2, 2015 Issued
Array ( [id] => 11327079 [patent_doc_number] => 20160357691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'Systems and Methods for Asynchronous Toggling of I2C Data Line' [patent_app_type] => utility [patent_app_number] => 14/729858 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3064 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729858 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729858
Systems and methods for asynchronous toggling of I2C data line Jun 2, 2015 Issued
Array ( [id] => 10471021 [patent_doc_number] => 20150356037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'Device And Method To Assign Device Pin Ownership For Multi-Processor Core Devices' [patent_app_type] => utility [patent_app_number] => 14/729879 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2802 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729879 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729879
Device and method to assign device pin ownership for multi-processor core devices Jun 2, 2015 Issued
Array ( [id] => 10687880 [patent_doc_number] => 20160034025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'Physical Layer for Peripheral Interconnect with Reduced Power and Area' [patent_app_type] => utility [patent_app_number] => 14/729335 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14729335 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/729335
Physical layer for peripheral interconnect with reduced power and area Jun 2, 2015 Issued
Array ( [id] => 11292630 [patent_doc_number] => 20160342563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'Converter Module' [patent_app_type] => utility [patent_app_number] => 14/715897 [patent_app_country] => US [patent_app_date] => 2015-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4682 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715897 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/715897
Converter module May 18, 2015 Issued
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