Pamela J. Burgess

Array ( [id] => 12352413 [patent_doc_number] => 09952980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Deferring registration for DMA operations [patent_app_type] => utility [patent_app_number] => 14/714517 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14714517 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12146699 [patent_doc_number] => 09880952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Bus access controller, hardware engine, controller, and memory system' [patent_app_type] => utility [patent_app_number] => 14/713061 [patent_app_country] => US [patent_app_date] => 2015-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8782 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14713061 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12393477 [patent_doc_number] => 09965408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Apparatuses and methods for asymmetric input/output interface for a memory [patent_app_type] => utility [patent_app_number] => 14/712610 [patent_app_country] => US [patent_app_date] => 2015-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6052 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14712610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10651241 [patent_doc_number] => 09367494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Data processor and control system' [patent_app_type] => utility [patent_app_number] => 14/709219 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 15121 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14709219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10183717 [patent_doc_number] => 09213396 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-15 [patent_title] => 'Methods and apparatus for setting the address of a module using a clock' [patent_app_type] => utility [patent_app_number] => 14/703376 [patent_app_country] => US [patent_app_date] => 2015-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5330 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14703376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10576261 [patent_doc_number] => 09298908 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-29 [patent_title] => 'Methods and apparatus for setting the address of a module using a voltage' [patent_app_type] => utility [patent_app_number] => 14/703442 [patent_app_country] => US [patent_app_date] => 2015-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5524 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14703442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10401599 [patent_doc_number] => 20150286608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'METHODS TO SEND EXTRA INFORMATION IN-BAND ON INTER-INTEGRATED CIRCUIT (I2C) BUS' [patent_app_type] => utility [patent_app_number] => 14/700860 [patent_app_country] => US [patent_app_date] => 2015-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11350 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14700860 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12128186 [patent_doc_number] => 20180011772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'PERIPHERAL DEVICE OPERATION' [patent_app_type] => utility [patent_app_number] => 15/542814 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2877 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15542814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14034651 [patent_doc_number] => 10229077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Method for data transfer between real-time tasks using a DMA memory controller [patent_app_type] => utility [patent_app_number] => 15/125942 [patent_app_country] => US [patent_app_date] => 2015-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9448 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15125942 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10605002 [patent_doc_number] => 09325577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Automated data center network patching system' [patent_app_type] => utility [patent_app_number] => 14/657586 [patent_app_country] => US [patent_app_date] => 2015-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14657586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10269147 [patent_doc_number] => 20150154143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'Memory Interface and Method of Interfacing Between Functional Entities' [patent_app_type] => utility [patent_app_number] => 14/618215 [patent_app_country] => US [patent_app_date] => 2015-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8383 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14618215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13555681 [patent_doc_number] => 20180329388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => INTELLIGENT FUNCTION UNIT AND PROGRAMMABLE LOGIC CONTROLLER SYSTEM [patent_app_type] => utility [patent_app_number] => 15/536181 [patent_app_country] => US [patent_app_date] => 2015-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15536181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11739147 [patent_doc_number] => 09703730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Arbitration circuit and processing method of arbitration circuit' [patent_app_type] => utility [patent_app_number] => 14/605678 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6422 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605678 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12958027 [patent_doc_number] => 09838868 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-05 [patent_title] => Mated universal serial bus (USB) wireless dongles configured with destination addresses [patent_app_type] => utility [patent_app_number] => 14/606011 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10327958 [patent_doc_number] => 20150212962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'Servo Drive Device' [patent_app_type] => utility [patent_app_number] => 14/605559 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3253 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11614574 [patent_doc_number] => 09652431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-16 [patent_title] => 'Single wire communications using predictive host sampling window' [patent_app_type] => utility [patent_app_number] => 14/605135 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11020144 [patent_doc_number] => 20160217097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'STORAGE DEVICE CARRIER ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 14/605909 [patent_app_country] => US [patent_app_date] => 2015-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8836 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14605909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10731832 [patent_doc_number] => 20160077982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-17 [patent_title] => 'METHOD FOR SETTING UNIVERSAL SERIAL BUS (USB) INTERFACE OF ELECTRONIC DEVICE, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/603867 [patent_app_country] => US [patent_app_date] => 2015-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8053 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14603867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10485727 [patent_doc_number] => 20150370746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'BIDIRECTIONAL DATA TRANSMISSION SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/577289 [patent_app_country] => US [patent_app_date] => 2014-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14577289 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11860975 [patent_doc_number] => 09740658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Bus serialization for devices without multi-device support' [patent_app_type] => utility [patent_app_number] => 14/576559 [patent_app_country] => US [patent_app_date] => 2014-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4161 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14576559 [rel_patent_id] =>[rel_patent_doc_number] =>)