Search

Pancham Bakshi

Examiner (ID: 11748, Phone: (571)270-3463 , Office: P/1671 )

Most Active Art Unit
1623
Art Unit(s)
1621, 1671, 1623, 1673
Total Applications
1483
Issued Applications
1026
Pending Applications
175
Abandoned Applications
342

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18249103 [patent_doc_number] => 11605702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Method of manufacturing an integrated circuit comprising a capacitive element [patent_app_type] => utility [patent_app_number] => 17/165013 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4125 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/165013
Method of manufacturing an integrated circuit comprising a capacitive element Feb 1, 2021 Issued
Array ( [id] => 17130375 [patent_doc_number] => 20210305144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/155608 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8643 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17155608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/155608
Semiconductor device and manufacturing method thereof Jan 21, 2021 Issued
Array ( [id] => 16905144 [patent_doc_number] => 20210184060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => SOLID STATE IMAGING APPARATUS, PRODUCTION METHOD THEREOF AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/152265 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17152265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/152265
Solid state imaging apparatus, production method thereof and electronic device Jan 18, 2021 Issued
Array ( [id] => 16812606 [patent_doc_number] => 20210135161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/151263 [patent_app_country] => US [patent_app_date] => 2021-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151263 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151263
Display device Jan 17, 2021 Issued
Array ( [id] => 16827874 [patent_doc_number] => 20210143167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => Memory Arrays And Methods Used In Forming A Memory Array [patent_app_type] => utility [patent_app_number] => 17/151344 [patent_app_country] => US [patent_app_date] => 2021-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151344 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151344
Memory arrays and methods used in forming a memory array Jan 17, 2021 Issued
Array ( [id] => 16981558 [patent_doc_number] => 20210225795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => Power Semiconductor Device and Method for Fabricating a Power Semiconductor Device [patent_app_type] => utility [patent_app_number] => 17/150026 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/150026
Power Semiconductor Device and Method for Fabricating a Power Semiconductor Device Jan 14, 2021 Abandoned
Array ( [id] => 16812254 [patent_doc_number] => 20210134809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING ENLARGED CONTACT HOLE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/146577 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146577 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146577
Semiconductor devices including enlarged contact hole and methods of forming the same Jan 11, 2021 Issued
Array ( [id] => 16781900 [patent_doc_number] => 20210118979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SEMICONDUCTOR ARRANGEMENT AND METHOD OF MAKING [patent_app_type] => utility [patent_app_number] => 17/135286 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/135286
Semiconductor arrangement Dec 27, 2020 Issued
Array ( [id] => 16765566 [patent_doc_number] => 20210111148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => METHOD OF USING OPTOELECTRONIC SEMICONDUCTOR STAMP TO MANUFACTURE OPTOELECTRONIC SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/131092 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131092
Method of using optoelectronic semiconductor stamp to manufacture optoelectronic semiconductor device Dec 21, 2020 Issued
Array ( [id] => 18317605 [patent_doc_number] => 11631690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Three-dimensional memory device including trench-isolated memory planes and method of making the same [patent_app_type] => utility [patent_app_number] => 17/122296 [patent_app_country] => US [patent_app_date] => 2020-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 45 [patent_no_of_words] => 18011 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17122296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/122296
Three-dimensional memory device including trench-isolated memory planes and method of making the same Dec 14, 2020 Issued
Array ( [id] => 18304502 [patent_doc_number] => 11626418 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Three-dimensional memory device with plural channels per memory opening and methods of making the same [patent_app_type] => utility [patent_app_number] => 17/119051 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 81 [patent_figures_cnt] => 118 [patent_no_of_words] => 20529 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17119051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/119051
Three-dimensional memory device with plural channels per memory opening and methods of making the same Dec 10, 2020 Issued
Array ( [id] => 16781935 [patent_doc_number] => 20210119014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => HIGH VOLTAGE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/117090 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117090
HIGH VOLTAGE SEMICONDUCTOR DEVICE Dec 8, 2020 Abandoned
Array ( [id] => 17615518 [patent_doc_number] => 20220157798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => THERMALLY ISOLATED SILICON-BASED DISPLAY [patent_app_type] => utility [patent_app_number] => 17/098494 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17098494 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/098494
Thermally isolated silicon-based display Nov 15, 2020 Issued
Array ( [id] => 18073744 [patent_doc_number] => 11532584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling [patent_app_type] => utility [patent_app_number] => 17/098754 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 46 [patent_no_of_words] => 12658 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17098754 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/098754
Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling Nov 15, 2020 Issued
Array ( [id] => 19524082 [patent_doc_number] => 12125822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Method of manufacturing a semiconductor device package having dummy dies [patent_app_type] => utility [patent_app_number] => 17/097059 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 7386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097059 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097059
Method of manufacturing a semiconductor device package having dummy dies Nov 12, 2020 Issued
Array ( [id] => 16677818 [patent_doc_number] => 20210066584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => NON-STOICHIOMETRIC RESISTIVE SWITCHING MEMORY DEVICE AND FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 17/097742 [patent_app_country] => US [patent_app_date] => 2020-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17097742 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/097742
NON-STOICHIOMETRIC RESISTIVE SWITCHING MEMORY DEVICE AND FABRICATION METHODS Nov 12, 2020 Abandoned
Array ( [id] => 16995403 [patent_doc_number] => 20210233823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/082643 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082643
Semiconductor packages and methods of manufacturing thereof Oct 27, 2020 Issued
Array ( [id] => 18024634 [patent_doc_number] => 20220376133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Method for Producing an Optoelectronic Semiconductor Component and Optoelectronic Semiconductor Component [patent_app_type] => utility [patent_app_number] => 17/773331 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17773331 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/773331
Method for Producing an Optoelectronic Semiconductor Component and Optoelectronic Semiconductor Component Oct 25, 2020 Pending
Array ( [id] => 18024634 [patent_doc_number] => 20220376133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Method for Producing an Optoelectronic Semiconductor Component and Optoelectronic Semiconductor Component [patent_app_type] => utility [patent_app_number] => 17/773331 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17773331 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/773331
Method for Producing an Optoelectronic Semiconductor Component and Optoelectronic Semiconductor Component Oct 25, 2020 Pending
Array ( [id] => 17566734 [patent_doc_number] => 20220130883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => CLOSE BUTTED COLLOCATED VARIABLE TECHNOLOGY IMAGING ARRAYS ON A SINGLE ROIC [patent_app_type] => utility [patent_app_number] => 17/079150 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17079150 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/079150
Close butted collocated variable technology imaging arrays on a single ROIC Oct 22, 2020 Issued
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