Pancham Bakshi

Array ( [id] => 6215975 [patent_doc_number] => 20100052069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'STATIC RAM CELL DESIGN AND MULTI-CONTACT REGIME FOR CONNECTING DOUBLE CHANNEL TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 12/507879 [patent_app_country] => US [patent_app_date] => 2009-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8732 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052069.pdf [firstpage_image] =>[orig_patent_app_number] => 12507879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6247258 [patent_doc_number] => 20100025803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/508196 [patent_app_country] => US [patent_app_date] => 2009-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5169 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20100025803.pdf [firstpage_image] =>[orig_patent_app_number] => 12508196 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6145475 [patent_doc_number] => 20110018116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'CHIP SCALE SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGE AND PROCESS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/507778 [patent_app_country] => US [patent_app_date] => 2009-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5582 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20110018116.pdf [firstpage_image] =>[orig_patent_app_number] => 12507778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6355238 [patent_doc_number] => 20100073016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'Electro-Mechanical Switches and Methods of Use Thereof' [patent_app_type] => utility [patent_app_number] => 12/507283 [patent_app_country] => US [patent_app_date] => 2009-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 28230 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20100073016.pdf [firstpage_image] =>[orig_patent_app_number] => 12507283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8897226 [patent_doc_number] => 08476749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'High-bandwidth ramp-stack chip package' [patent_app_type] => utility [patent_app_number] => 12/507349 [patent_app_country] => US [patent_app_date] => 2009-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12507349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6145354 [patent_doc_number] => 20110018038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'ION SENSITIVE FIELD EFFECT TRANSISTOR AND PRODUCTION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/506733 [patent_app_country] => US [patent_app_date] => 2009-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3193 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20110018038.pdf [firstpage_image] =>[orig_patent_app_number] => 12506733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8386630 [patent_doc_number] => 08264033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Semiconductor device having a floating semiconductor zone' [patent_app_type] => utility [patent_app_number] => 12/506844 [patent_app_country] => US [patent_app_date] => 2009-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 6154 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12506844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6598558 [patent_doc_number] => 20100032659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/506650 [patent_app_country] => US [patent_app_date] => 2009-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20100032659.pdf [firstpage_image] =>[orig_patent_app_number] => 12506650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6216073 [patent_doc_number] => 20100052129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'MULTI-CHIP PACKAGE AND MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/506519 [patent_app_country] => US [patent_app_date] => 2009-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6562 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052129.pdf [firstpage_image] =>[orig_patent_app_number] => 12506519 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8643137 [patent_doc_number] => 08368125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Multiple orientation nanowires with gate stack stressors' [patent_app_type] => utility [patent_app_number] => 12/505580 [patent_app_country] => US [patent_app_date] => 2009-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 28 [patent_no_of_words] => 5857 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12505580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8340057 [patent_doc_number] => 08241980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/500262 [patent_app_country] => US [patent_app_date] => 2009-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 37 [patent_no_of_words] => 11328 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12500262 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4517384 [patent_doc_number] => 07910934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Self-assembled heterogeneous integrated optical analysis system' [patent_app_type] => utility [patent_app_number] => 12/497518 [patent_app_country] => US [patent_app_date] => 2009-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 8446 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/910/07910934.pdf [firstpage_image] =>[orig_patent_app_number] => 12497518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8713781 [patent_doc_number] => 08399923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'High voltage semiconductor device including field shaping layer and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/495948 [patent_app_country] => US [patent_app_date] => 2009-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4373 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12495948 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5371601 [patent_doc_number] => 20090309161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-17 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 12/457537 [patent_app_country] => US [patent_app_date] => 2009-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20090309161.pdf [firstpage_image] =>[orig_patent_app_number] => 12457537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5532144 [patent_doc_number] => 20090231932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Semiconductor Device and Method Comprising a High Voltage Reset Driver and an Isolated Memory Array' [patent_app_type] => utility [patent_app_number] => 12/472913 [patent_app_country] => US [patent_app_date] => 2009-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3627 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20090231932.pdf [firstpage_image] =>[orig_patent_app_number] => 12472913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6556972 [patent_doc_number] => 20100289108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'Silicon dioxide cantilever support and method for silicon etched structures' [patent_app_type] => utility [patent_app_number] => 12/454257 [patent_app_country] => US [patent_app_date] => 2009-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20100289108.pdf [firstpage_image] =>[orig_patent_app_number] => 12454257 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6052158 [patent_doc_number] => 20110108860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'OPTOELECTRONIC MODULE' [patent_app_type] => utility [patent_app_number] => 12/922199 [patent_app_country] => US [patent_app_date] => 2009-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5101 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20110108860.pdf [firstpage_image] =>[orig_patent_app_number] => 12922199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5313554 [patent_doc_number] => 20090278152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'LIGHT EMITTING DIODE AND PACKAGE METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/435937 [patent_app_country] => US [patent_app_date] => 2009-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1484 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20090278152.pdf [firstpage_image] =>[orig_patent_app_number] => 12435937 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8897222 [patent_doc_number] => 08476745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-02 [patent_title] => 'Integrated circuit chip with reduced IR drop' [patent_app_type] => utility [patent_app_number] => 12/435398 [patent_app_country] => US [patent_app_date] => 2009-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4067 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12435398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6425442 [patent_doc_number] => 20100277868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'INSULATED METAL SUBSTRATES INCORPORATING ADVANCED COOLING' [patent_app_type] => utility [patent_app_number] => 12/433301 [patent_app_country] => US [patent_app_date] => 2009-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2333 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20100277868.pdf [firstpage_image] =>[orig_patent_app_number] => 12433301 [rel_patent_id] =>[rel_patent_doc_number] =>)