Search

Paras D. Shah

Examiner (ID: 9016, Phone: (571)270-1650 , Office: P/2659 )

Most Active Art Unit
2659
Art Unit(s)
2653, 2626, 2659
Total Applications
738
Issued Applications
515
Pending Applications
27
Abandoned Applications
203

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17993381 [patent_doc_number] => 20220359418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => Semiconductor Device and Method of Embedding Circuit Pattern in Encapsulant for SIP Module [patent_app_type] => utility [patent_app_number] => 17/307727 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307727 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/307727
Semiconductor device and method of embedding circuit pattern in encapsulant for SIP module May 3, 2021 Issued
Array ( [id] => 17780140 [patent_doc_number] => 20220246490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 17/246035 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246035 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/246035
Semiconductor device and method of manufacture Apr 29, 2021 Issued
Array ( [id] => 17986085 [patent_doc_number] => 20220352122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => DUAL DIE SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/243208 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243208 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/243208
Dual die semiconductor package and manufacturing method thereof Apr 27, 2021 Issued
Array ( [id] => 18482678 [patent_doc_number] => 11696447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Semiconductor device and electronic system including the same [patent_app_type] => utility [patent_app_number] => 17/241232 [patent_app_country] => US [patent_app_date] => 2021-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 14089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17241232 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/241232
Semiconductor device and electronic system including the same Apr 26, 2021 Issued
Array ( [id] => 17188870 [patent_doc_number] => 20210335755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => PROCESS FOR PRODUCING A HIGH-FREQUENCY-COMPATIBLE ELECTRONIC MODULE [patent_app_type] => utility [patent_app_number] => 17/240789 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17240789 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/240789
Process for producing a high-frequency-compatible electronic module Apr 25, 2021 Issued
Array ( [id] => 17963665 [patent_doc_number] => 20220344246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => ELECTRONIC ASSEMBLY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 17/239482 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17239482 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/239482
Electronic assembly Apr 22, 2021 Issued
Array ( [id] => 18000867 [patent_doc_number] => 11501978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/234109 [patent_app_country] => US [patent_app_date] => 2021-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 35 [patent_no_of_words] => 6128 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17234109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/234109
Semiconductor device and manufacturing method thereof Apr 18, 2021 Issued
Array ( [id] => 18669996 [patent_doc_number] => 11776908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Semiconductor die edge protection for semiconductor device assemblies and associated systems and methods [patent_app_type] => utility [patent_app_number] => 17/231210 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 11167 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231210 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/231210
Semiconductor die edge protection for semiconductor device assemblies and associated systems and methods Apr 14, 2021 Issued
Array ( [id] => 17908653 [patent_doc_number] => 11462516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/220604 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 5556 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220604
Method of manufacturing semiconductor device Mar 31, 2021 Issued
Array ( [id] => 16981799 [patent_doc_number] => 20210226036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/220593 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220593 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220593
Semiconductor device structure and method for forming the same Mar 31, 2021 Issued
Array ( [id] => 18175175 [patent_doc_number] => 11574892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Semiconductor package having pads with stepped structure [patent_app_type] => utility [patent_app_number] => 17/216334 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 11518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216334 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216334
Semiconductor package having pads with stepped structure Mar 28, 2021 Issued
Array ( [id] => 17630694 [patent_doc_number] => 20220165709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => STACKED SEMICONDUCTOR PACKAGE AND PACKAGING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/210452 [patent_app_country] => US [patent_app_date] => 2021-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/210452
Stacked semiconductor package and packaging method thereof Mar 22, 2021 Issued
Array ( [id] => 18593349 [patent_doc_number] => 11742260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Three-dimensional device cooling [patent_app_type] => utility [patent_app_number] => 17/207495 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8790 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17207495 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/207495
Three-dimensional device cooling Mar 18, 2021 Issued
Array ( [id] => 19108740 [patent_doc_number] => 11961854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/203759 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7273 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203759 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203759
Semiconductor device Mar 16, 2021 Issued
Array ( [id] => 18105570 [patent_doc_number] => 11545468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Wafer stacking method and wafer stacking structure [patent_app_type] => utility [patent_app_number] => 17/202248 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 6501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202248 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202248
Wafer stacking method and wafer stacking structure Mar 14, 2021 Issued
Array ( [id] => 18073725 [patent_doc_number] => 11532565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => System on integrated chips and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/201917 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201917
System on integrated chips and methods of forming the same Mar 14, 2021 Issued
Array ( [id] => 16959141 [patent_doc_number] => 11063024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-13 [patent_title] => Method to form a 3D semiconductor device and structure [patent_app_type] => utility [patent_app_number] => 17/195517 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 62 [patent_no_of_words] => 19710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195517 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195517
Method to form a 3D semiconductor device and structure Mar 7, 2021 Issued
Array ( [id] => 18054064 [patent_doc_number] => 11527457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Package structure with buffer layer embedded in lid layer [patent_app_type] => utility [patent_app_number] => 17/185986 [patent_app_country] => US [patent_app_date] => 2021-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 9663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185986 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185986
Package structure with buffer layer embedded in lid layer Feb 25, 2021 Issued
Array ( [id] => 17277964 [patent_doc_number] => 20210384162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 17/172478 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17172478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/172478
Semiconductor chip, semiconductor device, and semiconductor package including the semiconductor chip Feb 9, 2021 Issued
Array ( [id] => 17941746 [patent_doc_number] => 11476205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Package structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/171136 [patent_app_country] => US [patent_app_date] => 2021-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7825 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17171136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/171136
Package structure and method for forming the same Feb 8, 2021 Issued
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