Search

Paras D. Shah

Examiner (ID: 9016, Phone: (571)270-1650 , Office: P/2659 )

Most Active Art Unit
2659
Art Unit(s)
2653, 2626, 2659
Total Applications
738
Issued Applications
515
Pending Applications
27
Abandoned Applications
203

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15332249 [patent_doc_number] => 20200006454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/566819 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566819
Display device and method for manufacturing display device Sep 9, 2019 Issued
Array ( [id] => 16959332 [patent_doc_number] => 11063216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Confined phase change memory with double air gap [patent_app_type] => utility [patent_app_number] => 16/560202 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6289 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560202 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560202
Confined phase change memory with double air gap Sep 3, 2019 Issued
Array ( [id] => 19294622 [patent_doc_number] => 12033987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Display device, display module, and electronic device [patent_app_type] => utility [patent_app_number] => 17/270722 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 32 [patent_no_of_words] => 17075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17270722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/270722
Display device, display module, and electronic device Aug 25, 2019 Issued
Array ( [id] => 17284122 [patent_doc_number] => 11201164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Memory devices [patent_app_type] => utility [patent_app_number] => 16/546821 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546821 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546821
Memory devices Aug 20, 2019 Issued
Array ( [id] => 16668639 [patent_doc_number] => 10937898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Lateral bipolar junction transistor with dual base region [patent_app_type] => utility [patent_app_number] => 16/540831 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540831 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540831
Lateral bipolar junction transistor with dual base region Aug 13, 2019 Issued
Array ( [id] => 16645734 [patent_doc_number] => 10923602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/532645 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 11132 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532645 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/532645
Semiconductor devices Aug 5, 2019 Issued
Array ( [id] => 16959137 [patent_doc_number] => 11063020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Semiconductor device, manufacturing method for semiconductor device, and electronic device [patent_app_type] => utility [patent_app_number] => 16/521215 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 38 [patent_no_of_words] => 14954 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521215 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521215
Semiconductor device, manufacturing method for semiconductor device, and electronic device Jul 23, 2019 Issued
Array ( [id] => 15092919 [patent_doc_number] => 20190341271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => LOW COST PACKAGE WARPAGE SOLUTION [patent_app_type] => utility [patent_app_number] => 16/515981 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515981 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515981
Low cost package warpage solution Jul 17, 2019 Issued
Array ( [id] => 16846018 [patent_doc_number] => 11018114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory [patent_app_type] => utility [patent_app_number] => 16/515979 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8637 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515979 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515979
Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory Jul 17, 2019 Issued
Array ( [id] => 15565009 [patent_doc_number] => 20200066916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => Ferroelectric MFM Inductor And Related Circuits [patent_app_type] => utility [patent_app_number] => 16/513429 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513429 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513429
Ferroelectric MFM inductor and related circuits Jul 15, 2019 Issued
Array ( [id] => 15045687 [patent_doc_number] => 20190333848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION [patent_app_type] => utility [patent_app_number] => 16/509387 [patent_app_country] => US [patent_app_date] => 2019-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16509387 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/509387
Ground via clustering for crosstalk mitigation Jul 10, 2019 Issued
Array ( [id] => 15367805 [patent_doc_number] => 20200019667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING CELL REGION HAVING MOR SIMILAR CELL DENSITIES IN DIFFERENT HEIGHT ROWS, AND METHOD AND SYSTEM FOR GENERATING LAYOUT DIAGRAM OF SAME [patent_app_type] => utility [patent_app_number] => 16/502869 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/502869
Semiconductor device including cell region having more similar cell densities in different height rows, and method and system for generating layout diagram of same Jul 2, 2019 Issued
Array ( [id] => 16464079 [patent_doc_number] => 10847439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Heat spreaders for use with semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/460941 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4738 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460941 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460941
Heat spreaders for use with semiconductor devices Jul 1, 2019 Issued
Array ( [id] => 16819955 [patent_doc_number] => 11004793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Method of forming an interconnect structure having an air gap and structure thereof [patent_app_type] => utility [patent_app_number] => 16/459115 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 9187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459115 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459115
Method of forming an interconnect structure having an air gap and structure thereof Jun 30, 2019 Issued
Array ( [id] => 14969123 [patent_doc_number] => 20190312040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => SRAM Circuits with Aligned Gate Electrodes [patent_app_type] => utility [patent_app_number] => 16/450068 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/450068
SRAM circuits with aligned gate electrodes Jun 23, 2019 Issued
Array ( [id] => 16528797 [patent_doc_number] => 20200402878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => GROUNDING LIDS IN INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 16/446388 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446388
Grounding lids in integrated circuit devices Jun 18, 2019 Issued
Array ( [id] => 17122102 [patent_doc_number] => 11133244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Semiconductor device package and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/446559 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 7057 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446559 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446559
Semiconductor device package and method for manufacturing the same Jun 18, 2019 Issued
Array ( [id] => 16528757 [patent_doc_number] => 20200402838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => DIFFUSION BREAK STRUCTURES IN SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/446588 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446588
Diffusion break structures in semiconductor devices Jun 18, 2019 Issued
Array ( [id] => 16528830 [patent_doc_number] => 20200402911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 16/446368 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446368 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446368
Semiconductor device package Jun 18, 2019 Issued
Array ( [id] => 16410162 [patent_doc_number] => 10818731 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Three-dimensional nonvolatile memory [patent_app_type] => utility [patent_app_number] => 16/446532 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 6010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446532 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/446532
Three-dimensional nonvolatile memory Jun 18, 2019 Issued
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