Paroma Mukhopadhyay
Examiner (ID: 5136)
Most Active Art Unit | 3792 |
Art Unit(s) | 3792 |
Total Applications | 56 |
Issued Applications | 3 |
Pending Applications | 46 |
Abandoned Applications | 7 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18226460
[patent_doc_number] => 20230065454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => COMMUNICATION METHOD AND APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/979998
[patent_app_country] => US
[patent_app_date] => 2022-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 44216
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979998
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/979998 | COMMUNICATION METHOD AND APPARATUS | Nov 2, 2022 | Pending |
Array
(
[id] => 18208474
[patent_doc_number] => 20230054732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-23
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/976085
[patent_app_country] => US
[patent_app_date] => 2022-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 33236
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17976085
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/976085 | Memory system | Oct 27, 2022 | Issued |
Array
(
[id] => 18227090
[patent_doc_number] => 20230066084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => DISTRIBUTED STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/969763
[patent_app_country] => US
[patent_app_date] => 2022-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 33319
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969763
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/969763 | Distributed storage system | Oct 19, 2022 | Issued |
Array
(
[id] => 18804862
[patent_doc_number] => 11838032
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-12-05
[patent_title] => Advanced ultra low power error correcting code encoders and decoders
[patent_app_type] => utility
[patent_app_number] => 17/968249
[patent_app_country] => US
[patent_app_date] => 2022-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 9782
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17968249
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/968249 | Advanced ultra low power error correcting code encoders and decoders | Oct 17, 2022 | Issued |
Array
(
[id] => 18169901
[patent_doc_number] => 20230036512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => APPLICATION OF LOW-DENSITY PARITY-CHECK CODES WITH CODEWORD SEGMENTATION
[patent_app_type] => utility
[patent_app_number] => 17/961410
[patent_app_country] => US
[patent_app_date] => 2022-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14701
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961410
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/961410 | APPLICATION OF LOW-DENSITY PARITY-CHECK CODES WITH CODEWORD SEGMENTATION | Oct 5, 2022 | Pending |
Array
(
[id] => 18919573
[patent_doc_number] => 11881869
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-01-23
[patent_title] => Asymmetric bit errors in low-density parity-check codes for non-volatile memory devices
[patent_app_type] => utility
[patent_app_number] => 17/957974
[patent_app_country] => US
[patent_app_date] => 2022-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 7029
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957974
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/957974 | Asymmetric bit errors in low-density parity-check codes for non-volatile memory devices | Sep 29, 2022 | Issued |
Array
(
[id] => 18857039
[patent_doc_number] => 11854630
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Storage device that uses a host memory buffer and a memory management method including the same
[patent_app_type] => utility
[patent_app_number] => 17/952370
[patent_app_country] => US
[patent_app_date] => 2022-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 5887
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952370
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/952370 | Storage device that uses a host memory buffer and a memory management method including the same | Sep 25, 2022 | Issued |
Array
(
[id] => 18310144
[patent_doc_number] => 20230114044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => Method of Testing a Stacked Integrated Circuit Device
[patent_app_type] => utility
[patent_app_number] => 17/934250
[patent_app_country] => US
[patent_app_date] => 2022-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16903
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934250
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/934250 | Method of testing a stacked integrated circuit device | Sep 21, 2022 | Issued |
Array
(
[id] => 18804863
[patent_doc_number] => 11838033
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-12-05
[patent_title] => Partial speed changes to improve in-order transfer
[patent_app_type] => utility
[patent_app_number] => 17/949130
[patent_app_country] => US
[patent_app_date] => 2022-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5353
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949130
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/949130 | Partial speed changes to improve in-order transfer | Sep 19, 2022 | Issued |
Array
(
[id] => 18968120
[patent_doc_number] => 11901912
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-02-13
[patent_title] => Memory controller and method of accessing flash memory
[patent_app_type] => utility
[patent_app_number] => 17/933195
[patent_app_country] => US
[patent_app_date] => 2022-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 8614
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933195
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/933195 | Memory controller and method of accessing flash memory | Sep 18, 2022 | Issued |
Array
(
[id] => 18349228
[patent_doc_number] => 20230137339
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-04
[patent_title] => MEMORY DEVICE, MEMORY MODULE INCLUDING THE MEMORY DEVICE, AND OPERATING METHOD OF MEMORY CONTROLLER
[patent_app_type] => utility
[patent_app_number] => 17/932734
[patent_app_country] => US
[patent_app_date] => 2022-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8804
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932734
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/932734 | MEMORY DEVICE, MEMORY MODULE INCLUDING THE MEMORY DEVICE, AND OPERATING METHOD OF MEMORY CONTROLLER | Sep 15, 2022 | Pending |
Array
(
[id] => 18849790
[patent_doc_number] => 20230412194
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => ENCODER AND FLASH MEMORY CONTROLLER
[patent_app_type] => utility
[patent_app_number] => 17/945110
[patent_app_country] => US
[patent_app_date] => 2022-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6253
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945110
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/945110 | Encoder and flash memory controller | Sep 14, 2022 | Issued |
Array
(
[id] => 18294457
[patent_doc_number] => 20230104143
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-06
[patent_title] => PRODUCT AUTOENCODER FOR ERROR-CORRECTING VIA SUB-STAGE PROCESSING
[patent_app_type] => utility
[patent_app_number] => 17/942064
[patent_app_country] => US
[patent_app_date] => 2022-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9394
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17942064
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/942064 | PRODUCT AUTOENCODER FOR ERROR-CORRECTING VIA SUB-STAGE PROCESSING | Sep 8, 2022 | Pending |
Array
(
[id] => 18439712
[patent_doc_number] => 20230187007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-15
[patent_title] => CHIP HAVING DEBUG FUNCTION AND CHIP DEBUGGING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/899006
[patent_app_country] => US
[patent_app_date] => 2022-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7378
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899006
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/899006 | Chip having debug function and chip debugging method | Aug 29, 2022 | Issued |
Array
(
[id] => 18501143
[patent_doc_number] => 20230223961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => ITERATIVE DECODER FOR CORRECTING DRAM DEVICE FAILURES
[patent_app_type] => utility
[patent_app_number] => 17/896994
[patent_app_country] => US
[patent_app_date] => 2022-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6788
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896994
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/896994 | ITERATIVE DECODER FOR CORRECTING DRAM DEVICE FAILURES | Aug 25, 2022 | Pending |
Array
(
[id] => 18079363
[patent_doc_number] => 20220404975
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-22
[patent_title] => APPARATUS, SYSTEM, AND METHOD OF BYTE ADDRESSABLE AND BLOCK ADDRESSABLE STORAGE AND RETRIEVAL OF DATA TO AND FROM NON-VOLATILE STORAGE MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/891077
[patent_app_country] => US
[patent_app_date] => 2022-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3994
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891077
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/891077 | APPARATUS, SYSTEM, AND METHOD OF BYTE ADDRESSABLE AND BLOCK ADDRESSABLE STORAGE AND RETRIEVAL OF DATA TO AND FROM NON-VOLATILE STORAGE MEMORY | Aug 17, 2022 | Abandoned |
Array
(
[id] => 19080050
[patent_doc_number] => 11949436
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Low-density parity-check coding scheme with varying puncturing pattern
[patent_app_type] => utility
[patent_app_number] => 17/887162
[patent_app_country] => US
[patent_app_date] => 2022-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 18534
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887162
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/887162 | Low-density parity-check coding scheme with varying puncturing pattern | Aug 11, 2022 | Issued |
Array
(
[id] => 18951553
[patent_doc_number] => 11894863
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-06
[patent_title] => Method and apparatus for generating a decoding position control signal for decoding using polar codes
[patent_app_type] => utility
[patent_app_number] => 17/884935
[patent_app_country] => US
[patent_app_date] => 2022-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5022
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884935
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/884935 | Method and apparatus for generating a decoding position control signal for decoding using polar codes | Aug 9, 2022 | Issued |
Array
(
[id] => 18875378
[patent_doc_number] => 11863204
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Decoder circuit including decoders with respective performance and power levels and decoding respective subsets of codewords of received data
[patent_app_type] => utility
[patent_app_number] => 17/882136
[patent_app_country] => US
[patent_app_date] => 2022-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 7141
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882136
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/882136 | Decoder circuit including decoders with respective performance and power levels and decoding respective subsets of codewords of received data | Aug 4, 2022 | Issued |
Array
(
[id] => 19122321
[patent_doc_number] => 11966303
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-23
[patent_title] => Memory system failure detection and self recovery of memory dice
[patent_app_type] => utility
[patent_app_number] => 17/877779
[patent_app_country] => US
[patent_app_date] => 2022-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6275
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877779
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/877779 | Memory system failure detection and self recovery of memory dice | Jul 28, 2022 | Issued |